CN105374741A - Wafer bonding method and bonding component of wafer - Google Patents
Wafer bonding method and bonding component of wafer Download PDFInfo
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- CN105374741A CN105374741A CN201410439755.1A CN201410439755A CN105374741A CN 105374741 A CN105374741 A CN 105374741A CN 201410439755 A CN201410439755 A CN 201410439755A CN 105374741 A CN105374741 A CN 105374741A
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Abstract
The invention provides a wafer bonding method and a bonding component of a wafer. The wafer bonding method comprises the following steps of forming a plurality of first embossments on a first fitting end surface of a first wafer, wherein first gaps are arranged among the plurality of first embossments; forming a plurality of second embossments on a second fitting end surface of a second wafer, wherein second gaps are arranged among the plurality of second embossments; the second gaps can accommodate the first embossments and the first gaps can accommodate the second embossments; and carrying out bonding technology on the first wafer and the second wafer. Sizes of the first embossments and the second embossments are smaller than sizes of a first fitting end and a second fitting end so that a contact surface between the first fitting end and the second fitting end is divided into a plurality of contact surfaces with small sizes. Because of depressions of first embossment surfaces and second embossment surfaces, a proportion of a key and a gap on the contact surface is reduced and an actual contact surface of the first fitting end and the second fitting end is effectively increased so that connection quality between the wafers is increased.
Description
Technical field
The present invention relates to semiconductor applications, be specifically related to a kind of method of wafer bonding and the bond member of wafer.
Background technology
Wafer scale copper-copper bonding (WaferlevelCu-Cubonding), as 3D integrated circuit key technology, high-end product has important application trend.Wafer scale copper-copper bonding is the interconnection technique between a kind of wafer, multiple wafer is aimed at bonding by this interconnection technique mutually, make the copper-connection of multiple crystal column surface be exposed to the laminating end of crystal column surface bonded to each other, thus realize the electrical connection of interconnection structure between multiple wafer.The surface smoothness of wafer scale copper-copper bonding technology to copper-connection laminating end requires very high, ensure good contact.
But when wafer bonding, often occur bond voids between the laminating end of two wafers, this easily causes the problem that between wafer, quality of connection is deteriorated.
Therefore the quality of connection after how improving wafer bonding between wafer, becomes those skilled in the art's problem demanding prompt solution.
Summary of the invention
The problem that the present invention solves is to provide a kind of method of wafer bonding and the bond member of wafer, increases the real contact area between laminating end, to improve the quality of connection between wafer.
For solving the problem, the invention provides a kind of method of wafer bonding, comprising:
First wafer and the second wafer are provided;
The first laminating end is formed in the first wafer;
Form multiple first projection on the surface of described first laminating end, between described first projection, there is the first space;
The second laminating end is formed in the second wafer;
Form multiple second projection on the surface of described second laminating end, have Second gap between described second projection, described second projection is used for being positioned in described first space, and described Second gap is protruding for holding first;
Bonding technology is carried out to the first wafer and the second wafer, the first laminating end and the second laminating end is made mutually to aim at laminating, make the first projection be arranged in Second gap and contact with the second end surfaces of fitting, also make the second projection be arranged in the first space and contact with the first end surfaces of fitting.
Optionally, the step forming the first laminating end in the first wafer comprises:
The first groove is formed in described first wafer;
The first metal layer is filled to the surface covering the first wafer in described first groove;
Carry out cmp to described the first metal layer, to the surface of exposing the first wafer, the first metal layer being positioned at the first groove forms described first laminating end.
Optionally, the step forming multiple first projection on the surface of described first laminating end comprises:
Described first wafer and the first laminating end form first medium layer;
Multiple the second groove exposing the first laminating end surfaces is formed in described first medium layer;
The second metal level is filled to covering first medium layer surface in described second groove;
Carry out cmp to described second metal level, to exposing first medium layer surface, the second metal level being positioned at multiple second groove forms multiple first projection;
Remove described first medium layer.
Optionally, the step forming the second laminating end in the second wafer comprises:
The 3rd groove is formed in described second wafer;
The 3rd metal level is filled to the surface covering the second wafer in described 3rd groove;
Carry out cmp to the surface of exposing the second wafer to described 3rd metal level, the 3rd metal level being positioned at the 3rd groove forms described second laminating end.
Optionally, the step described second laminating end forming multiple second projection comprises:
Second dielectric layer is formed at described second wafer and the second laminating end surfaces;
Multiple the 4th groove exposing the first laminating end surfaces is formed in described second dielectric layer;
The 4th metal level is filled to covering second dielectric layer surface in described 4th groove;
Carry out cmp to described 4th metal level, to exposing second dielectric layer surface, the 4th metal level being positioned at multiple 4th groove forms multiple second projection;
Remove described second dielectric layer.
Optionally, described first is protruding identical with the height of the second projection, in the scope of 0.6 to 1.6 microns.
Optionally, make the described first upper surface that is protruding and the second projection be rectangle, the area of described first projection and the second upper convex surface is in the scope of 4 square microns to 16 square microns.
Optionally, described first projection and the first space are arranged in array at the first laminating end surfaces, and all alternately adjacent with the first space with the first projection on column direction in the row direction; Described second projection and Second gap are arranged in array at described second coating surface, and all staggered adjacent with the second projection on column direction and Second gap in the row direction; Described first is protruding corresponding with the position of described Second gap, and the size of the first projection is less than the size of Second gap; Described second is protruding corresponding with the position in described first space, and the size of the second projection is less than the size in the first space.
Optionally, described first projection and the second projection are strip projected parts, and the first space and Second gap are strip space.
Optionally, in the scope of the width 2 microns to 4 microns of described first projection and the second projection, the width of described first space and Second gap is in the scope of 4 microns to 6 microns.
Optionally, described first is protruding identical with the height of the second projection.
Optionally, carry out in the step of bonding technology to the first wafer and the second wafer,
Temperature is in the scope of 300 degrees Celsius to 500 degrees Celsius;
Pressure is in the scope of 1MP to 2MP;
Time is in the scope of 30 seconds to 90 seconds.
The present invention also provides a kind of bond member of wafer, the bond member of described wafer be arranged at carry out bonding technology the first wafer and the second wafer on, comprising:
Be arranged in the first laminating end of the first wafer; Protrude from multiple first projections of described first laminating end surfaces, between described first projection, there is the first space;
Be arranged in the second laminating end of the second wafer; Protruding from multiple second projections of described second laminating end surfaces, for being placed in described first space in bonding technology, having Second gap between described second projection, described Second gap is used in bonding technology, hold described first projection.
Optionally, described first is protruding identical with the height of the second projection, in the scope of 0.6 to 1.6 microns.
Optionally, the described first upper surface that is protruding and the second projection is rectangle, and the area of described first projection and the second upper convex surface is in the scope of 4 square microns to 16 square microns.
Optionally, described first projection is array-like arrangement at the first laminating end surfaces; Described second projection is array-like arrangement at the second laminating end surfaces; Described first is protruding corresponding with the position of described Second gap, and the size of the first projection is less than the size of Second gap; Described second is protruding corresponding with the position in described first space, and the size of the second projection is less than the size in the first space.
Optionally, described first projection and the second projection are strip projected parts, and described first space and Second gap are strip space.
Optionally, the width of described first projection and the second projection is in the scope of 2 microns to 4 microns, and the width of described first space and Second gap is in the scope of 4 microns to 6 microns.
Optionally, described first is protruding identical with the height of the second projection.
Optionally, the described first protruding, the second projection, the first laminating end, the second laminating end material is copper.
Compared with prior art, technical scheme of the present invention has the following advantages:
In the present invention, because first protruding, the second projection and first are fitted, to hold end of fitting with second to compare size less, therefore when wafer bonding, contact-making surface between first wafer and the second wafer is the raised contact surfaces that multiple size is less, correspondingly, depression size on the raised contact surfaces that size is less is also smaller, the ratio that key that the depression on contact-making surface causes and space account for contact-making surface can be reduced, increase real contact area between the first laminating end and the second laminating end, improve the quality of connection between wafer.
Accompanying drawing explanation
Fig. 1 to Fig. 3 is the schematic diagram of a kind of wafer bonding method of prior art;
Fig. 4 to Figure 14 is the schematic diagram of wafer bonding method one embodiment of the present invention.
Embodiment
When wafer bonding, often there is bond voids between the laminating end of two wafers in prior art, this easily causes the quality of connection between wafer to be deteriorated.
To between the laminating end of two wafers, process in conjunction with wafer bonding often occurs that the reason of bond voids makes analysis.
Referring to figs. 1 to Fig. 3, show the schematic diagram of a kind of wafer bonding method of prior art.
First provide on the first wafer 01, first wafer 01 as shown in Figure 1 and comprise first medium layer 11 and the semiconductor structure being arranged in first medium layer 11, and the first laminating end 12 exposed from the surface of first medium layer 11.First wafer 01 is formed in the step of the first laminating end 12, general elder generation forms the groove of corresponding first laminating end 12 shape in first medium layer 11, again in described groove and first medium layer 11 forming metal layer on surface, cmp is carried out to layer on surface of metal, the metal level removing segment thickness is to exposing first medium layer 11, and the metal level being arranged in groove forms the first laminating end 12.In the step of cmp, lapping liquid is easily assembled at the zone line of the first laminating end 12, makes after cmp, and the zone line surface of the first laminating end 12 forms depression.
There is provided on the second wafer 02, second wafer 02 as shown in Figure 2 and comprise second dielectric layer 13 and the semiconductor structure being arranged in second dielectric layer 14, and the second laminating end 14 exposed from the surface of second dielectric layer 13.Because same reason, the second wafer 02 is formed in the step of the second laminating end 14, the zone line surface of the second laminating end 14 also easily forms depression.
With reference to figure 3, carrying out in the step of bonding technology to the first wafer 01 and the second wafer 02, the first laminating end 12 and the second laminating end 14 is made to aim at laminating, because the first laminating end 12 and the second laminating end 14 surface exist depression, larger bond voids 15 is formed between first laminating end 12 and the second laminating end 14 after wafer bonding, and the very little bonding quality that have impact on the first wafer 01 and the second wafer 02 of real contact area of the first laminating end 12 and the second laminating end 14, and then cause the inefficacy of formed semiconductor device.
In order to solve the problems of the technologies described above, the present invention proposes a kind of method of wafer bonding, comprising: provide the first wafer and the second wafer; The first laminating end is formed in the first wafer; Form multiple first projection on the surface of described first laminating end, between described first projection, there is the first space; The second laminating end is formed in the second wafer; Form multiple second projection on the surface of described second laminating end, have Second gap between described second projection, described second projection can be positioned in described first space, and described Second gap can hold the first projection; Bonding technology is carried out to the first wafer and the second wafer, the first laminating end and the second laminating end is made mutually to aim at laminating, make the first projection be arranged in Second gap and contact with the second end surfaces of fitting, also make the second projection be arranged in the first space and contact with the first end surfaces of fitting.
Because first protruding, the second projection and first are fitted, to hold end of fitting with second to compare size less, therefore when wafer bonding, contact-making surface between first wafer and the second wafer is the raised contact surfaces that multiple size is less, correspondingly, depression size on the raised contact surfaces that size is less is also smaller, the ratio that key that the depression on contact-making surface causes and space account for contact-making surface can be reduced, increase real contact area between the first laminating end and the second laminating end, improve the quality of connection between wafer.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.
With reference to figure 4, first wafer 10 is provided, in the present embodiment, first wafer 10 comprises substrate (not shown), described substrate is silicon substrate, in other embodiments, described substrate can also be other Semiconductor substrate such as germanium silicon substrate or silicon-on-insulator substrate, does not do any restriction to this present invention.
In other embodiments, can also comprise the labyrinth that multilayer has semiconductor device in wafer 10, the present invention is not restricted this.
Continue with reference to figure 4, the first wafer comprises interlayer dielectric layer 100 and is arranged in the interconnection structure 104 of dielectric layer 100.
Particularly, in the present embodiment, the material of described interlayer dielectric layer 100 is silica, in other embodiments, other materials can also be adopted, the material of described interlayer dielectric layer 100 can also be photosensitive benzocyclobutene or silicon nitride etc., and the material of the present invention to described interlayer dielectric layer 100 does not limit.
In the present embodiment, interconnection structure 104 in described interlayer dielectric layer 100 is copper-connection, but the material of the present invention to interconnection structure 104 does not limit, in other embodiments, described interconnection structure 104 can also be the interconnection structure of the other materials such as aluminium interconnection or the interconnection of copper aluminium.
It should be noted that, in other embodiments, substrate can also be formed multilayer interlayer dielectric layer and be arranged in the interconnection structure of interlayer dielectric layer, the present invention is not restricted this.
With reference to figure 5, in the first wafer 10, form the first groove 105.
Particularly, in the present embodiment, form the first groove 105 in interlayer dielectric layer 100, the method forming the first groove 105 can adopt photoetching.Expose interconnection structure 104 bottom first groove 105, be electrically connected with interconnection structure 104 to make the first laminating end formed in the first groove 105.
In conjunction with reference to figure 6, in described first groove 105, fill the first metal layer 106 to covering first wafer 10 surface.
Particularly, in the present embodiment, the material of described the first metal layer 106 is copper, but the material of the present invention to the first metal layer 106 does not limit, and in other embodiments, described the first metal layer 106 can also be other metal materials, as aluminium etc.
With reference to figure 7, cmp is carried out to described the first metal layer 106, to the surface of exposing the first wafer 10, in the present embodiment, after cmp, exposes the surface of interlayer dielectric layer 100.The first metal layer 106 being positioned at the first groove 105 forms the first laminating end 101.
With reference to figure 8, form first medium layer 108 at described first wafer 10 and the first laminating end 101 surface.
Particularly, in the present embodiment, the material of first medium layer 108 is silica, but the concrete material of the present invention to first medium layer 108 does not limit, and in other embodiments, the material of first medium layer 108 can also be silicon nitride etc.
Form multiple second groove 109 in first medium layer 108 above the first laminating end 101, bottom described multiple second groove 109, expose the first laminating end 101 surface.
With reference to figure 9, in described second groove 109, fill the second metal level 110 to the surface covering first medium layer 108.
Particularly, in the present embodiment, the material of described second metal level 110 is copper, but the material of the present invention to the second metal level 110 does not limit, and in other embodiments, described second metal level 110 can also be other metal materials, as aluminium etc.
In conjunction with reference to Figure 10, carry out cmp to described second metal level 110, to exposing first medium layer 108 surface, the second metal level 110 being positioned at multiple second groove 109 forms multiple first projection 102.
Continue, with reference to Figure 10, to remove described first medium layer 108, expose described first laminating end 101 surface, between multiple first projection 102, the original position of first medium layer 108 forms the first space 103.
In conjunction with reference Figure 11, second wafer 20 is provided, in the second wafer 20, form the second laminating end 201 exposed from the surface of the second wafer 20, form multiple second projection 202 on described second laminating end 201 surface, between multiple second projection 202, there is Second gap 203.
Described second projection 202 is for being positioned in described first space 103, and described Second gap 203 is for holding the first projection 102.
Formed the second laminating end 201, multiple second projection 202 method with to form the first fit end 101, multiple first projection 102 and first method in space 103 similar, roughly comprise:
The 3rd groove (not shown) is formed in described second wafer 20; The 3rd metal level is filled to covering the second wafer 20 surface in described 3rd groove; Carry out cmp to described 3rd metal level (not shown), to exposing the second wafer 20 surface, the 3rd metal level being positioned at the 3rd groove forms the second laminating end 201.
The step forming multiple second projection 202 at described second laminating end surfaces comprises:
Second dielectric layer (not shown) is formed at described second wafer 20 and the second laminating end 201 surface; Form multiple 4th groove (not shown) in second dielectric layer above the second laminating end 201, described multiple 4th bottom portion of groove exposes the second laminating end 201 surface; The 4th metal level (not shown) is filled to covering second dielectric layer surface in described 4th groove; Carry out cmp to described 4th metal level, to exposing second dielectric layer surface, the second metal level being positioned at multiple 4th groove forms multiple second projection 202; Remove described second dielectric layer, expose described second laminating end 201 surface, between multiple second projection 202, form Second gap 203.
In the present embodiment, the material of described 3rd metal level and the 4th metal level is copper.
It should be noted that, in the present embodiment, make described first projection 102 identical with the height of the second projection 202, to make carrying out in the engineering of bonding technology to the first wafer 10 and the second wafer 20, first projection 102 is contained in after in Second gap 203, can to fit end 201 surface contact with second; Second projection 202 is contained in after in the first space 103, can fits end 201 surface contact with first.But the present invention does not limit whether the first projection 102 is identical with the height of the second projection 202, in other embodiments, the height of the described first protruding 102 and second projection 202 can have certain difference.
In the present embodiment, make the height of the described first protruding 102 and second projection 202 in the scope of 0.6 to 1.6 microns, within the scope of this, the first protruding 102 and second projection 202 is not easy to damage in bonding technology, and contact is good.In other embodiments, the degree of depth along with the 4th groove is different and different to the cmp degree of the second metal level, and the height of the second projection 202 also can not in the scope of 0.6 to 1.6 microns.
With reference to Figure 12, show the vertical view on the first laminating end 101 surface described in the present embodiment.In the present embodiment, the upper surface making the described first protruding 102 and second projection 202 is rectangle.
Particularly, as shown in figure 12, the described first protruding 102 and first space 103 is arranged in array on the first laminating end 101 surface, and on the line direction and column direction of array, the first protruding 102 and first space 103 is all alternately adjacent, forms one " gridiron pattern " structure.
As shown in figure 13, described second projection 202 and Second gap 203 are arranged in array on described second laminating end 201 surface, and all alternately adjacent with Second gap 203 with the second projection 202 on column direction in the row direction, form another " gridiron pattern " structure.
Gridiron pattern structure on first wafer and the gridiron pattern structure on the second wafer are complementary relationship, and specifically, the first projection 102 is corresponding with the position of Second gap 203, and the second projection 202 is corresponding with the position in the first space 103.Simultaneously, the size of Second gap 203 is greater than the first projection 102, the size in the first space 103 is greater than the size of the second projection 202, with in follow-up wafer bonding technique, first projection 102 can be contained in Second gap 203, second projection 202 can be contained in the first space 103, and in follow-up wafer bonding technique, leave certain pre-allowance, make the aligning of the first wafer 10 and the second wafer 20 have certain deviation, first protruding 102 can not cause damage because contacting with the surface of the second projection 202.
The area of the described first protruding 102 and second protruding 202 upper surfaces is in the scope of 4 square microns to 16 square microns.The area of the first protruding 102 and second protruding 202 upper surfaces is much smaller than the area of described first laminating end 101 and the second laminating end 201 upper surface, therefore, it is possible to effectively reduce the ratio that bond voids accounts for the first laminating end 101 and the second laminating end 201 contact-making surface after wafer bonding technique.
With reference to Figure 14, bonding technology is carried out to the first wafer 10 and the second wafer 20, make the first laminating end 101 and the second laminating end 201 mutually aim at laminating, and the first projection 102 is contained in Second gap 203, and to fit end 201 surface contact with second; Second projection 202 is contained in the first space 103, and fits end 101 surface contact with first.
In the present embodiment, utilize wafer double-sided alignment technology the first laminating end 101 on the first wafer 10 and the end 201 of fitting of second on the second wafer 20 mutually to be aimed at, the first laminating end 101 and the second deviation of fitting between end 201 can be reduced.
It should be noted that, wafer double-sided alignment technology is a kind of technique of alignment adopting infrared ray to aim at, but the present invention is not restricted this, in other embodiments, the other technologies such as laser alignment can also be adopted the first laminating end 101 on the first wafer 10 and the end 201 of fitting of second on the second wafer 20 mutually to be aimed at.
Metal bonding technique is carried out after completing aligning, first of the first wafer 10 the laminating end 101 and the end 201 of fitting of second on wafer 20 is made mutually to aim at laminating, certain mechanical pressure is applied to the first wafer 10 and the second wafer 20, the first laminating end 101 and second end 201 of fitting firmly is fit together.
In the step of carrying out metal bonding technique, by the heating temperatures in wafer bonding processing chamber in the scope of 300 degrees Celsius to 500 degrees Celsius, pressure, in the scope of 1MP to 2MP, carries out the time of metal bonding technique in the scope of 30 seconds to 90 seconds.
Due in the process of bonding technology, the first projection 102 can be contained in Second gap 203, and the second projection 202 can be contained in the first space 103.After like this first laminating end 101 and the second laminating end 201 being fitted, fit end 101 and the second area of fitting end 201 of the real contact area and first of the first laminating end 101 and the second laminating end 201 is more or less the same, but divide in order to multiple little contact-making surface, the each little contact-making surface i.e. surface of the first protruding 102 or second projection 202, on the surface of the first protruding 102 or second projection 202, the depression size formed by cmp is less, make after the first laminating end 101 and the second laminating end 201 are fitted, first protruding 102 or second protruding 202 depressions in the surface and ratio that the key that causes and space account for contact-making surface reduces, the real contact area of the first laminating end 101 and the second laminating end 201 effectively increases, the oxidation making the first laminating end 101 and the second laminating end 201 not easily come in contact face causes the loose contact even defect such as open circuit, improve the quality of connection between the first wafer 10 and the second wafer 20.
First protruding 102 or second projection 202 of the rectangle of array-like arrangement in the present embodiment, the density of multiple little contact-making surface on the first laminating end 101 and the second laminating end 201 can be made larger, be conducive to enlarge active surface, improve the quality of connection between the first wafer 10 and the second wafer 20.
It should be noted that, the shape of the present invention to the first protruding 102 and second projection 202 does not limit, and in other embodiments, make the described first protruding 102 and second projection 202 be strip projected parts, the first space 103 and Second gap 203 are strip space.
Particularly, can make the width of the first of described strip protruding 102 and second projection 202 in the scope of 2 microns to 4 microns, make the width of the first space 103 of described strip and Second gap 203 in the scope of 4 microns to 6 microns.First space 103 of described strip and the width of Second gap 203 are slightly larger than the width of the first protruding 102 and second projection 202 of described strip, make the first space 103 and Second gap 203 can hold the first protruding 102 and second projection 202, and in follow-up wafer bonding technique, leave certain pre-allowance, when making the aligning of the first wafer 10 and the second wafer 20 have a certain deviation, first protruding 102 can not cause damaging because contact with the surface of the second projection 202.
Also it should be noted that, the bonding between the method for wafer bonding of the present invention is not limited in two wafers, is also applicable to the bonding between multiple wafer.When carrying out bonding technology to multiple wafer, laminating end being all set in the upper and lower surface of part wafer, all forming projection and the space between multiple projection at the laminating end surfaces of multiple wafer, make the space on the laminating end of multiple wafer to hold projection.In bonding technology between multiple wafer, make the laminating end of multiple wafer mutually aim at laminating, and projection is contained in space, and contact with laminating end surfaces, and then improve the quality of connection between multiple wafer.
The present invention also provides a kind of bond member of wafer, on the first wafer being arranged at bonding technology and the second wafer.
In the present embodiment, can continue with reference to Figure 10, Figure 11, the bond member of described wafer is arranged on the first wafer 10 and the second wafer 20.
The bond member of described wafer comprises:
Be arranged in the first laminating end 101 of the first wafer 10; Protrude from multiple first projections 102 on described first laminating end 101 surface, between described first projection 102, there is the first space 103.
Be arranged in the second laminating end 201 of the second wafer 20; Protrude from multiple second projections 202 on described second laminating end 201 surface, for being placed in described first space 103 in bonding technology, have Second gap 203 between described second projection 202, described Second gap 203 for holding described first projection 102 in bonding technology.
It should be noted that, in the present embodiment, the material of described first projection 102, second projection 202, first laminating end 101, second laminating end 201 is copper.But the material of the present invention to the first projection 102, second projection 202, first laminating end 101, second laminating end 201 does not limit, in other embodiments, the material of described first projection 102, second projection 202, first laminating end 101, second laminating end 201 also can be other metal materials, as aluminium etc.
It should be noted that, in the present embodiment, described first projection 102 is identical with the height of the second projection 202, to make carrying out in the engineering of bonding technology to the first wafer 10 and the second wafer 20, first projection 102 is contained in after in Second gap 203, can to fit end 201 surface contact with second; Second projection 202 is contained in after in the first space 103, can fits end 201 surface contact with first.But the present invention does not limit whether the first projection 102 is identical with the height of the second projection 202, in other embodiments, the height of the described first protruding 102 and second projection 202 can have certain difference.
In the present embodiment, the height of the described first protruding 102 and second projection 202 is in the scope of 0.6 to 1.6 microns.Within the scope of this, the first protruding 102 and second projection 202 is not easy to damage in bonding technology, and contact is good.In other embodiments, the height of the second projection 202 also can not in the scope of 0.6 to 1.6 microns.
Can continue with reference to Figure 12,13, respectively illustrate the vertical view on the first laminating end 101 and the second laminating end 201 surface described in the present embodiment.In the present embodiment, the upper surface making the described first protruding 102 and second projection 202 is rectangle.The area of the described first protruding 102 and second projection 202 is in the scope of 4 square microns to 16 square microns.The area of the first protruding 102 and second protruding 202 upper surfaces is much smaller than the area of described first laminating end 101 and the second laminating end 201 upper surface, therefore, it is possible to effectively reduce the ratio that bond voids accounts for the first laminating end 101 and the second laminating end 201 contact-making surface after wafer bonding technique.
Particularly, as shown in figure 12, the described first protruding 102 and first space 103 is arranged in array on the first laminating end 101 surface, and on the line direction and column direction of array, the first protruding 102 and first space 103 is all alternately adjacent, forms one " gridiron pattern " structure.
As shown in figure 13, described second projection 202 and Second gap 203 are arranged in array on described second laminating end 201 surface, and all alternately adjacent with Second gap 203 with the second projection 202 on column direction in the row direction, form another " gridiron pattern " structure.
Gridiron pattern structure on first wafer and the gridiron pattern structure on the second wafer are complementary relationship, and specifically, the first projection 102 is corresponding with the position of Second gap 203, and the second projection 202 is corresponding with the position in the first space 103.Simultaneously, the size of Second gap 203 is greater than the first projection 102, the size in the first space 103 is greater than the size of the second projection 202, with in follow-up wafer bonding technique, first projection 102 can be contained in Second gap 203, second projection 202 can be contained in the first space 103, and in follow-up wafer bonding technique, leave certain pre-allowance, when making the aligning of the first wafer 10 and the second wafer 20 have a certain deviation, first protruding 102 can not cause damaging because contact with the surface of the second projection 202.
The area of the described first protruding 102 and second protruding 202 upper surfaces is in the scope of 4 square microns to 16 square microns.The area of the first protruding 102 and second protruding 202 upper surfaces is much smaller than the area of described first laminating end 101 and the second laminating end 201 upper surface, therefore, it is possible to effectively reduce the ratio that bond voids accounts for the first laminating end 101 and the second laminating end 201 contact-making surface after wafer bonding technique.
Like this first wafer and the second wafer are seized and technique time, after first laminating end 101 and the second laminating end 201 are fitted, fit end 101 and the second area of fitting end 201 of the real contact area and first of the first laminating end 101 and the second laminating end 201 is more or less the same, but divide in order to multiple little contact-making surface, the each little contact-making surface i.e. surface of the first protruding 102 or second projection 202, on the surface of the first protruding 102 or second projection 202, the depression size formed due to cmp is less, make after the first laminating end 101 and the second laminating end 201 are fitted, first protruding 102 or second protruding 202 depressions in the surface and ratio that the key that causes and space account for contact-making surface is less, the real contact area of the first laminating end 101 and the second laminating end 201 effectively increases, make the first laminating end 101 and the second laminating end 201 not easily because the oxidation of contact-making surface causes the loose contact even defect such as open circuit, improve the quality of connection between the first wafer 10 and the second wafer 20.
Adopt the first protruding 102 or second projection 202 of the rectangle of array-like arrangement in the present embodiment, the density of the first laminating end 101 and the second multiple little contact-making surface in laminating end 201 surface can be made larger, be conducive to enlarge active surface, improve the quality of connection between the first wafer 10 and the second wafer 20.
It should be noted that, the shape of the present invention to the first protruding 102 and second projection 202 does not limit, and in other embodiments, make the described first protruding 102 and second projection 202 be strip, the first space 103 and Second gap 203 are strip.Make the width of the first of described strip protruding 102 and second projection 202 in the scope of 2 microns to 4 microns, make the width of the first space 103 of described strip and Second gap 203 in the scope of 4 microns to 6 microns.First space 103 of described strip and the width of Second gap 203 are slightly larger than the width of the first protruding 102 and second projection 202 of described strip, make the first space 103 and Second gap 203 can hold the first protruding 102 and second projection 202, and in follow-up wafer bonding technique, leave certain pre-allowance, when making the aligning of the first wafer 10 and the second wafer 20 have a certain deviation, the surface of the first protruding 102 and second projection 202 can not contact and cause damage.
It should be noted that, the bond member of wafer of the present invention can be arranged on multiple first wafer and the second wafer, wherein the upper and lower surface of part first wafer or the second wafer all can arrange the bond member of described wafer, in multiple wafer bonding technique, by multiple first wafer and the mutual bonding of the second wafer, the quality of connection between multiple first wafer and the second wafer can be improved.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (20)
1. a method for wafer bonding, is characterized in that, comprising:
First wafer and the second wafer are provided;
The first laminating end is formed in the first wafer;
Form multiple first projection on the surface of described first laminating end, between described first projection, there is the first space;
The second laminating end is formed in the second wafer;
Formed multiple protruding for being placed on second in the first space on the surface of described second laminating end, there is between described second projection the Second gap for holding the first projection;
Bonding technology is carried out to the first wafer and the second wafer, the first laminating end and the second laminating end is made mutually to aim at laminating, make the first projection be arranged in Second gap and contact with the second end surfaces of fitting, also make the second projection be arranged in the first space and contact with the first end surfaces of fitting.
2. the method for claim 1, is characterized in that, the step forming the first laminating end in the first wafer comprises:
The first groove is formed in described first wafer;
The first metal layer is filled to the surface covering the first wafer in described first groove;
Carry out cmp to described the first metal layer, to the surface of exposing the first wafer, the first metal layer being positioned at the first groove forms described first laminating end.
3. the method for claim 1, is characterized in that, the step forming multiple first projection on the surface of described first laminating end comprises:
Described first wafer and the first laminating end form first medium layer;
Multiple the second groove exposing the first laminating end surfaces is formed in described first medium layer;
The second metal level is filled to covering first medium layer surface in described second groove;
Carry out cmp to described second metal level, to exposing first medium layer surface, the second metal level being positioned at multiple second groove forms multiple first projection;
Remove described first medium layer.
4. the method for claim 1, is characterized in that, the step forming the second laminating end in the second wafer comprises:
The 3rd groove is formed in described second wafer;
The 3rd metal level is filled to the surface covering the second wafer in described 3rd groove;
Carry out cmp to the surface of exposing the second wafer to described 3rd metal level, the 3rd metal level being positioned at the 3rd groove forms described second laminating end.
5. the method for claim 1, is characterized in that, the step that described second laminating end is formed multiple second projection comprises:
Second dielectric layer is formed at described second wafer and the second laminating end surfaces;
Multiple the 4th groove exposing the first laminating end surfaces is formed in described second dielectric layer;
The 4th metal level is filled to covering second dielectric layer surface in described 4th groove;
Carry out cmp to described 4th metal level, to exposing second dielectric layer surface, the 4th metal level being positioned at multiple 4th groove forms multiple second projection;
Remove described second dielectric layer.
6. the method for claim 1, is characterized in that, described first is protruding identical with the height of the second projection.
7. the method for claim 1, is characterized in that, make the described first upper surface that is protruding and the second projection be rectangle, the area of described first projection and the second upper convex surface is in the scope of 4 square microns to 16 square microns.
8. method as claimed in claim 7, is characterized in that, described first projection and the first space are arranged in array at the first laminating end surfaces, and all alternately adjacent with the first space with the first projection on column direction in the row direction;
Described second projection and Second gap are arranged in array at described second coating surface, and all staggered adjacent with the second projection on column direction and Second gap in the row direction;
Described first is protruding corresponding with the position of described Second gap, and the size of the first projection is less than the size of Second gap;
Described second is protruding corresponding with the position in described first space, and the size of the second projection is less than the size in the first space.
9. the method for claim 1, is characterized in that, described first projection and the second projection are strip projected parts, and the first space and Second gap are strip space.
10. method as claimed in claim 9, is characterized in that, in the scope of the width 2 microns to 4 microns of described first projection and the second projection, the width of described first space and Second gap is in the scope of 4 microns to 6 microns.
11. the method for claim 1, is characterized in that, described first is protruding identical with the height of the second projection.
12. the method for claim 1, is characterized in that, carry out in the step of bonding technology to the first wafer and the second wafer,
Temperature is in the scope of 300 degrees Celsius to 500 degrees Celsius;
Pressure is in the scope of 1MP to 2MP;
Time is in the scope of 30 seconds to 90 seconds.
The bond member of 13. 1 kinds of wafers, be arranged at carry out bonding technology the first wafer and the second wafer on, it is characterized in that, comprising:
Be arranged in the first laminating end of the first wafer; Protrude from multiple first projections of described first laminating end surfaces, between described first projection, there is the first space;
Be arranged in the second laminating end of the second wafer; Protruding from multiple second projections of described second laminating end surfaces, for being placed in described first space in bonding technology, having Second gap between described second projection, described Second gap is used in bonding technology, hold described first projection.
14. bond member as claimed in claim 13, is characterized in that, described first is protruding identical with the height of the second projection, in the scope of 0.6 to 1.6 microns.
15. bond member as claimed in claim 13, is characterized in that, the described first upper surface that is protruding and the second projection is rectangle, and the area of described first projection and the second upper convex surface is in the scope of 4 square microns to 16 square microns.
16. bond member as claimed in claim 15, is characterized in that, described first projection is array-like arrangement at the first laminating end surfaces; Described second projection is array-like arrangement at the second laminating end surfaces; Described first is protruding corresponding with the position of described Second gap, and the size of the first projection is less than the size of Second gap; Described second is protruding corresponding with the position in described first space, and the size of the second projection is less than the size in the first space.
17. bond member as claimed in claim 13, is characterized in that, described first projection and the second projection are strip projected parts, and described first space and Second gap are strip space.
18. bond member as claimed in claim 17, is characterized in that, the width of described first projection and the second projection is in the scope of 2 microns to 4 microns, and the width of described first space and Second gap is in the scope of 4 microns to 6 microns.
19. bond member as claimed in claim 13, is characterized in that, described first is protruding identical with the height of the second projection.
20. bond member as claimed in claim 13, is characterized in that, the described first protruding, the second projection, the first laminating end, the second laminating end material is copper.
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| CN110896025A (en) * | 2019-10-28 | 2020-03-20 | 芯盟科技有限公司 | Wafer bonding method and bonded wafer |
| CN111580265A (en) * | 2020-04-28 | 2020-08-25 | 无锡微奥科技有限公司 | Micro-electromechanical system micro-mirror and manufacturing method thereof |
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| CN105374741B (en) | 2019-07-02 |
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