CN105140269B - A kind of junction termination structures of transverse direction high voltage power device - Google Patents

Abstract

The invention belongs to the technical field of semiconductors, and in particular relates to a junction terminal structure of a lateral high-voltage power device. In the structure of the present invention, in the connecting part of the linear junction terminal structure and the curvature junction terminal structure, in the Y direction, the distance between the P-type buried layer and the N-type drift region is 5 microns. In the actual process, the N-type drift region 2 is formed by ion implantation. After annealing and pushing the junction, the N-type drift region will diffuse in the Y direction, and the P-type buried layer will exceed the N-type drift region 2 by some distance, so that the diffused N The P-type drift region is depleted with P-type impurities. In this way, the problem of charge imbalance can be improved in the connecting part of the straight junction terminal structure and the curvature junction terminal structure, thereby obtaining a more optimized breakdown voltage. The beneficial effect of the present invention is to improve the problem of charge imbalance in the connection part of the linear junction terminal structure and the curvature junction terminal structure, avoid premature breakdown of the device, and obtain an optimized breakdown voltage.

Description

A Junction Termination Structure for Lateral High Voltage Power Devices

technical field

The invention belongs to the technical field of semiconductors, and in particular relates to a junction terminal structure of a lateral high-voltage power device.

Background technique

The development of high-voltage power integrated circuits is inseparable from the integration of lateral high-voltage power semiconductor devices. Lateral high-voltage power semiconductor devices are usually closed structures, including circular, racetrack and interdigitated structures. For the closed racetrack structure and interdigitated structure, there will be small curvature terminations in the curved part and the fingertip part, and the electric field lines are easy to concentrate at the small curvature radius, which will lead to early avalanche breakdown of the device at the small curvature radius , which poses new challenges to the layout structure of lateral high-voltage power devices.

The Chinese patent with publication number CN102244092A discloses a junction terminal structure of a lateral high-voltage power device. As shown in Figure 1, the device terminal structure includes drain N ⁺ 1, N-type drift region 2, P-type substrate 3, gate Polysilicon 4, gate oxide layer 5, P-well region 6, source N ⁺ 7, source P ⁺ 8. The device structure is divided into two parts, including a straight junction termination structure and a curvature junction termination structure. In the linear junction terminal structure, the P-well region 6 is connected to the N-type drift region 2. When a high voltage is applied to the drain, the PN junction metallurgical junction formed by the P-well region 6 and the N-type drift region 2 begins to deplete. The depletion region of the lightly doped N-type drift region 2 will mainly bear the withstand voltage, and the electric field peak appears at the PN junction metallurgical junction formed by the P-well region 6 and the N-type drift region 2 . In order to solve the problem that the power lines of the PN junction curvature metallurgical junction formed by the highly doped P-well region 6 and the lightly doped N-type drift region 2 are highly concentrated, causing avalanche breakdown of the device in advance, the patent adopts a method as shown in Figure 1. The curvature junction terminal structure shown, the highly doped P-well region 6 is connected to the lightly doped P-type substrate 3, the lightly doped P-type substrate 3 is connected to the lightly doped N-type drift region 2, and the highly doped P- The distance between the well region 6 and the lightly doped N-type drift region 2 is L _P . When a high voltage is applied to the drain of the device, the lightly doped P-type substrate 3 connected to the lightly doped N-type drift region 2 in the curvature of the fingertip of the device source replaces the highly doped P-well region 6 and the lightly doped N-type The PN junction metallurgical junction formed by the drift region 2, the lightly doped P-type substrate 3 adds additional charges to the depletion region, which not only effectively reduces the high electric field peak due to the highly doped P-well region 6, but also interacts with the N Type drift region 2 introduces a new electric field peak. Since both the P-type substrate 3 and the N-type drift region 2 are lightly doped, the peak value of the electric field at the metallurgical junction is reduced under the same bias voltage condition. In addition, due to the contact between the highly doped P-well region 6 of the device fingertip curvature and the lightly doped P-type substrate 3, the radius at the end of the P-type curvature is increased, which alleviates the excessive concentration of electric field lines and prevents the device from being in the source. The early breakdown of the curvature of the fingertip increases the breakdown voltage of the curvature of the fingertip of the device. At the same time, the junction termination structure proposed in this patent is also applied in triple RESURF structure devices. Figure 2 is a schematic cross-sectional view of a device with an N-type drift region 2 in a triple RESURF structure in a linear junction termination structure; Figure 3 is a schematic cross-sectional view of a device with an N-type drift region 2 in a triple RESURF structure in a curvature junction termination structure. However, under the triple RESURF structure device, the patent does not optimize the terminal structure of the connecting part of the straight junction terminal structure and the curvature junction terminal structure. In the connected part, due to the imbalance of charges, the power device will break down early, so the device The withstand voltage is not the optimum value.

Contents of the invention

What the present invention aims to solve is to propose a junction terminal structure of a lateral high-voltage power device for the defect of charge imbalance in traditional devices.

To achieve the above object, the present invention adopts the following technical solutions:

A junction termination structure of a lateral high-voltage power device, as shown in FIG. 4 , includes a straight junction termination structure and a curvature junction termination structure;

The linear junction terminal structure is the same as that of the active region of the lateral high-voltage power device, including the drain N ⁺ contact region 1, the N-type drift region 2, the P-type substrate 3, the gate polysilicon 4, the gate oxide layer 5, the P- Well region 6, source N ⁺ contact region 7, source P ⁺ contact region 8, P-type buried layer 9; P-well region 6 and N-type drift region 2 are located on the upper layer of P-type substrate 3, where P-well Region 6 is located in the middle, with N-type drift region 2 on both sides, and P-well region 6 is connected to N-type drift region 2; both sides of N-type drift region 2 away from P-well region 6 are drain N ⁺ contact regions 1 , the surface of the P-well region 6 has a source N ⁺ contact region 7 and a source P ⁺ contact region 8 connected to the metallized source, wherein the source P ⁺ contact region 8 is located in the middle, and the source N ⁺ contact region 7 Located on both sides of the source P ⁺ contact region 8; the P-type buried layer 9 is located in the N-type drift region 2, between the P-well region 6 and the N ⁺ contact region 1; the source N ⁺ contact region 7 is connected to the N-type drift region Above the surface of the P-well region 6 between the regions 2 is the gate oxide layer 5 , and above the surface of the gate oxide layer 5 is the gate polysilicon 4 .

The curvature junction termination structure includes a drain N ⁺ contact region 1, an N-type drift region 2, a P-type substrate 3, a gate polysilicon 4, a gate oxide layer 5, a P-well region 6, and a source P ⁺ contact region 8 , P-type buried layer 9; the gate oxide layer 5 is above the surface of the P-well region 6, and the gate polysilicon 4 is above the surface of the gate oxide layer 5; N ⁺ contact region 1 and N-type drift region 2 in the curvature junction termination structure , gate polysilicon 4, gate oxide layer 5 and P-type buried layer 9 are respectively connected with N ⁺ contact region 1, N-type drift region 2, gate polysilicon 4, gate oxide layer 5 and P-type buried layer in the linear junction termination structure 9 are connected and form a ring structure; wherein, the ring-shaped N ⁺ contact region 1 in the curvature junction termination structure surrounds the ring-shaped N-type drift region 2, and the ring-shaped N-type drift region 2 in the curvature junction termination structure has a ring-shaped gate polysilicon 4 and a ring Gate oxide layer 5; different from "the P-well region 6 in the linear junction termination structure is connected to the N-type drift region 2", the P-well region 6 in the curvature junction termination structure is not connected to the N-type drift region 2 and The mutual spacing is L _P , and the specific value range of L _P is between a few microns and tens of microns;

It is characterized in that, the junction of the P-type buried layer 9 in the straight-line junction termination structure and the P-type buried layer 9 in the curvature junction termination structure and the N-type drift region 2 in the straight-line junction termination structure and the N-type drift region in the curvature junction termination structure The distance between the junction of the region 2 along the longitudinal direction of the device is b; the inner wall of the ring-shaped P-type buried layer 9 in the curvature junction termination structure and the ring-shaped N-type drift region 2 and the P-type substrate 3 in the curvature junction termination structure The distance between the joints is a.

In the general technical solution of the present invention, there is a distance b between the P-type buried layer 9 and the N-type drift region 2 in the connecting part of the straight junction terminal structure and the curvature junction terminal structure in the device longitudinal (Y) direction, and the specific value of b Range 0-10 microns. In the actual process, the N-type drift region 2 is formed by ion implantation. After annealing and pushing the junction, the N-type drift region 2 will diffuse in the Y direction, and the P-type buried layer 9 will exceed the N-type drift region 2 by some distance, so that the diffusion will go out. The N-type drift region 2 is depleted with P-type impurities. In this way, the problem of charge imbalance can be improved at the connecting portion of the straight junction terminal structure and the curvature junction terminal structure, thereby obtaining an optimized breakdown voltage. In the above scheme, it should be understood that the outer wall of the P-type buried layer 9 in the line junction termination structure and the P-type buried layer 9 in the curvature junction termination structure refers to a portion of the P-type buried layer 9 close to the N+ contact region 1 in the entire device. side, the inner wall refers to the side of the P-type buried layer 9 close to the P-type substrate 3 in the whole device; the outer wall and inner wall of other parts have this meaning; and the distances mentioned at the same time refer to the horizontal (X direction) cross-sectional view. spacing, not the actual physical spacing.

Further, the connection between the P-type buried layer 9 in the linear junction termination structure and the P-type buried layer 9 in the curvature junction termination structure is located in the P-type substrate 3, which is connected to the N-type drift region 2 and the N-type drift region 2 in the straight junction termination structure. The specific value range of the spacing b along the longitudinal direction of the device at the junction of the N-type drift region 2 in the curvature junction terminal structure is 0 to 10 microns.

Further, the connection between the P-type buried layer 9 in the linear junction termination structure and the P-type buried layer 9 in the curvature junction termination structure is located in the N-type drift region 2, which is connected to the N-type drift region 2 and the N-type drift region 2 in the straight junction termination structure. The specific value range of the spacing b along the longitudinal direction of the device at the junction of the N-type drift region 2 in the curvature junction terminal structure is 0 to 10 microns.

Further, the inner wall of the ring-shaped P-type buried layer 9 in the curvature junction termination structure is located in the P-type substrate 3, at the junction of the ring-shaped N-type drift region 2 and the P-type substrate 3 in the curvature junction termination structure The specific value range of the interval a is 0 to 10 microns.

Further, the inner wall of the ring-shaped P-type buried layer 9 in the curvature junction termination structure is located in the N-type drift region 2, which is connected to the ring-shaped N-type drift region 2 in the curvature junction termination structure and the P-type substrate 3 The specific value range of the interval a is 0 to 10 microns.

The beneficial effect of the present invention is that, by analyzing and optimizing the terminal structure of the connecting part of the linear junction terminal structure and the curvature junction terminal structure, the present invention improves the problem of charge imbalance in the connection part of the straight junction terminal structure and the curvature junction terminal structure, and avoids the problem of device Breakdown in advance, so as to get the most optimized breakdown voltage.

Description of drawings

FIG. 1 is a schematic diagram of a junction terminal structure of a conventional lateral high-voltage power semiconductor device;

FIG. 2 is a schematic cross-sectional view of a device in which the N-type drift region 2 is a triple RESURF structure in a conventional straight-line junction terminal structure;

3 is a schematic cross-sectional view of a device in which the N-type drift region 2 is a triple RESURF structure in a traditional device curvature junction terminal structure;

4 is a schematic diagram of a junction terminal structure of a lateral high-voltage power device of the present invention;

Fig. 5 is the structural representation of embodiment 1;

Fig. 6 is the structural representation of embodiment 2;

Fig. 7 is the structural representation of embodiment 3;

FIG. 8 is a schematic structural diagram of Embodiment 4.

Detailed ways

Below in conjunction with accompanying drawing and embodiment, describe technical solution of the present invention in detail:

Example 1:

As shown in Figure 5, the structure of this example includes a straight line knot terminal structure and a curvature knot terminal structure;

The linear junction terminal structure is the same as that of the active region of the lateral high-voltage power device, including the drain N ⁺ contact region 1, the N-type drift region 2, the P-type substrate 3, the gate polysilicon 4, the gate oxide layer 5, the P- Well region 6, source N ⁺ contact region 7, source P ⁺ contact region 8, P-type buried layer 9; P-well region 6 and N-type drift region 2 are located on the upper layer of P-type substrate 3, where P-well Region 6 is located in the middle, with N-type drift region 2 on both sides, and P-well region 6 is connected to N-type drift region 2; both sides of N-type drift region 2 away from P-well region 6 are drain N ⁺ contact regions 1 , the surface of the P-well region 6 has a source N ⁺ contact region 7 and a source P ⁺ contact region 8 connected to the metallized source, wherein the source P ⁺ contact region 8 is located in the middle, and the source N ⁺ contact region 7 Located on both sides of the source P ⁺ contact region 8; the P-type buried layer 9 is located in the N-type drift region 2, between the P-well region 6 and the N ⁺ contact region 1; the source N ⁺ contact region 7 is connected to the N-type drift region Above the surface of the P-well region 6 between the regions 2 is the gate oxide layer 5 , and above the surface of the gate oxide layer 5 is the gate polysilicon 4 .

The curvature junction termination structure includes a drain N ⁺ contact region 1, an N-type drift region 2, a P-type substrate 3, a gate polysilicon 4, a gate oxide layer 5, a P-well region 6, and a source P ⁺ contact region 8 , P-type buried layer 9; the gate oxide layer 5 is above the surface of the P-well region 6, and the gate polysilicon 4 is above the surface of the gate oxide layer 5; N ⁺ contact region 1 and N-type drift region 2 in the curvature junction termination structure , gate polysilicon 4, gate oxide layer 5 and P-type buried layer 9 are respectively connected with N ⁺ contact region 1, N-type drift region 2, gate polysilicon 4, gate oxide layer 5 and P-type buried layer in the linear junction termination structure 9 are connected and form a ring structure; wherein, the ring-shaped N ⁺ contact region 1 in the curvature junction termination structure surrounds the ring-shaped N-type drift region 2, and the ring-shaped N-type drift region 2 in the curvature junction termination structure has a ring-shaped gate polysilicon 4 and a ring Gate oxide layer 5; different from "the P-well region 6 in the linear junction termination structure is connected to the N-type drift region 2", the P-well region 6 in the curvature junction termination structure is not connected to the N-type drift region 2 and The mutual spacing is L _P , and the specific value range of L _P is between a few microns and tens of microns;

The connection between the P-type buried layer 9 in the linear junction termination structure and the P-type buried layer 9 in the curvature junction termination structure is located in the P-type substrate 3, which is connected to the N-type drift region 2 and the curvature junction termination structure in the straight junction termination structure. The distance b between the connection of the N-type drift region 2 in the structure along the longitudinal direction of the device is 5 microns; the inner wall of the ring-shaped P-type buried layer 9 in the curvature junction termination structure is located in the P-type substrate 3, which is connected to the curvature junction termination structure. The distance a between the junction of the annular N-type drift region 2 and the P-type substrate 3 in the structure is 5 microns.

The working principle of this example is: in the connecting part of the linear junction terminal structure and the curvature junction terminal structure, in the Y direction, the distance between the P-type buried layer 9 and the N-type drift region 2 is 5 microns. In the actual process, the N-type drift region 2 is formed by ion implantation. After annealing and pushing the junction, the N-type drift region 2 will diffuse in the Y direction, and the P-type buried layer 9 will exceed the N-type drift region 2 by some distance, so that the diffusion will go out. The N-type drift region 2 is depleted with P-type impurities. In this way, the problem of charge imbalance can be improved at the connecting portion of the straight junction terminal structure and the curvature junction terminal structure, thereby obtaining a more optimized breakdown voltage.

Example 2

As shown in FIG. 6 , the difference between this example and Example 1 is that the inner wall of the annular P-type buried layer 9 in the curvature junction termination structure is located in the N-type drift region 2 , and the principle is the same as that of Example 1.

Example 3

As shown in Figure 7, the difference between this example and Example 1 is that in this example, the connection between the P-type buried layer 9 and the P-type buried layer 9 in the curvature junction termination structure is located in the N-type drift region, its principle and implementation Example 1 is the same.

Example 4

As shown in Figure 8, the difference between this example and Example 2 is that in this example, the connection between the P-type buried layer 9 and the P-type buried layer 9 in the curvature junction termination structure is located in the N-type drift region, and its principle and implementation Example 2 is the same.

Claims (5)

1. A junction termination structure of a lateral high-voltage power device, including a straight junction termination structure and a curvature junction termination structure; The linear junction terminal structure is the same as that of the active region of the lateral high-voltage power device, including the drain N ⁺ contact region (1), the N-type drift region (2), the P-type substrate (3), and the gate polysilicon (4). , gate oxide layer (5), P-well region (6), source N ⁺ contact region (7), source P ⁺ contact region (8), P-type buried layer (9); P-well region (6 ) and the N-type drift region (2) are located on the upper layer of the P-type substrate (3), wherein the P-well region (6) is located in the middle, and the N-type drift region (2) is on both sides, and the P-well region (6) and The N-type drift region (2) is connected; the two sides away from the P-well region (6) in the N-type drift region (2) are the drain electrode N ⁺ contact region (1), and the surface of the P-well region (6) has the same Metallized source N ⁺ contact (7) and source P ⁺ contact (8) connected to the source, where the source P ⁺ contact (8) is in the middle and the source N ⁺ contact (7) is at the source On both sides of the pole P ⁺ contact region (8); the P-type buried layer (9) is located in the N-type drift region (2), between the P-well region (6) and the N ⁺ contact region (1); the source N ⁺ The top of the surface of the P-well region (6) between the contact region (7) and the N-type drift region (2) is a gate oxide layer (5), and the top of the surface of the gate oxide layer (5) is a gate polysilicon ( 4); The curvature junction terminal structure includes a drain N ⁺ contact region (1), an N-type drift region (2), a P-type substrate (3), a gate polysilicon (4), a gate oxide layer (5), a P-well region (6), source P ⁺ contact region (8), P-type buried layer (9); above the surface of the P-well region (6) is a gate oxide layer (5), and above the surface of the gate oxide layer (5) is Gate polysilicon (4); N ⁺ contact region (1), N-type drift region (2), gate polysilicon (4), gate oxide layer (5) and P-type buried layer (9) in curvature junction termination structure They are respectively connected to the N ⁺ contact region (1), N-type drift region (2), gate polysilicon (4), gate oxide layer (5) and P-type buried layer (9) in the linear junction terminal structure and form a ring structure ; Wherein, the ring-shaped N ⁺ contact region (1) in the curvature junction termination structure surrounds the ring-shaped N-type drift region (2), and the ring-shaped N-type drift region (2) in the curvature junction termination structure has ring-shaped gate polysilicon (4) and ring gate oxide layer (5); different from "the P-well region (6) in the linear junction termination structure is connected to the N-type drift region (2)", the P-well region (6) in the curvature junction termination structure ) is not connected to the N-type drift region (2) and the distance between them is L _P ; It is characterized in that the connection between the P-type buried layer (9) in the straight-line junction termination structure and the P-type buried layer (9) in the curvature junction termination structure and the N-type drift region (2) and curvature junction in the straight-line junction termination structure The distance between the junction of the N-type drift region (2) in the terminal structure along the longitudinal direction of the device is b, and along the longitudinal direction of the device, the P-type buried layer (9) exceeds the N-type drift region (2); the curvature junction terminal structure The distance between the inner wall of the ring-shaped P-type buried layer (9) and the junction of the ring-shaped N-type drift region (2) and the P-type substrate (3) in the curvature junction terminal structure is a. 2. The junction termination structure of a lateral high-voltage power device according to claim 1, characterized in that, the P-type buried layer (9) in the linear junction termination structure and the P-type buried layer (9) in the curvature junction termination structure ) is located in the P-type substrate (3), and the distance between it and the N-type drift region (2) in the linear junction termination structure and the N-type drift region (2) in the curvature junction termination structure along the longitudinal direction of the device The specific value range of b is 0 to 10 microns. 3. The junction termination structure of a lateral high-voltage power device according to claim 1, characterized in that, the P-type buried layer (9) in the linear junction termination structure and the P-type buried layer (9) in the curvature junction termination structure ) is located in the N-type drift region (2), and the distance between the junction of the N-type drift region (2) in the linear junction termination structure and the N-type drift region (2) in the curvature junction termination structure along the longitudinal direction of the device The specific value range of b is 0 to 10 microns. 4. The junction termination structure of a lateral high-voltage power device according to claim 2 or 3, wherein the inner wall of the ring-shaped P-type buried layer (9) in the curvature junction termination structure is located on the P-type substrate ( In 3), the distance a between the ring-shaped N-type drift region (2) and the P-type substrate (3) in the curvature junction terminal structure has a specific value range of 0 to 10 microns. 5. The junction termination structure of a lateral high-voltage power device according to claim 2 or 3, wherein the inner wall of the annular P-type buried layer (9) in the curvature junction termination structure is located in the N-type drift region ( In 2), the distance a between the ring-shaped N-type drift region (2) and the P-type substrate (3) in the curvature junction terminal structure has a specific value range of 0 to 10 microns.