CN104411106B - A kind of preparation method of printed circuit board fine-line - Google Patents
A kind of preparation method of printed circuit board fine-line Download PDFInfo
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- CN104411106B CN104411106B CN201410650334.3A CN201410650334A CN104411106B CN 104411106 B CN104411106 B CN 104411106B CN 201410650334 A CN201410650334 A CN 201410650334A CN 104411106 B CN104411106 B CN 104411106B
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- 238000002360 preparation method Methods 0.000 title abstract 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 52
- 229910052802 copper Inorganic materials 0.000 claims abstract description 52
- 239000010949 copper Substances 0.000 claims abstract description 52
- 238000000034 method Methods 0.000 claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 claims abstract description 24
- 238000005530 etching Methods 0.000 claims abstract description 13
- 238000011282 treatment Methods 0.000 claims description 32
- 239000000758 substrate Substances 0.000 claims description 29
- 238000007747 plating Methods 0.000 claims description 19
- 238000009713 electroplating Methods 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 11
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical group [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 9
- 239000002253 acid Substances 0.000 claims description 7
- 238000005260 corrosion Methods 0.000 claims description 5
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 claims description 3
- 230000002378 acidificating effect Effects 0.000 claims description 3
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 239000004744 fabric Substances 0.000 claims description 3
- 229920001568 phenolic resin Polymers 0.000 claims description 3
- 239000005011 phenolic resin Substances 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- -1 polytetrafluoroethylene Polymers 0.000 claims description 3
- 229920001343 polytetrafluoroethylene Polymers 0.000 claims description 3
- 239000004810 polytetrafluoroethylene Substances 0.000 claims description 3
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 2
- 230000004913 activation Effects 0.000 claims description 2
- 235000011149 sulphuric acid Nutrition 0.000 claims description 2
- 239000011152 fibreglass Substances 0.000 claims 1
- 230000003628 erosive effect Effects 0.000 abstract description 6
- 238000003384 imaging method Methods 0.000 abstract description 5
- 238000000608 laser ablation Methods 0.000 abstract description 5
- 230000001788 irregular Effects 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 abstract 2
- 239000000654 additive Substances 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000003365 glass fiber Substances 0.000 description 2
- 238000006552 photochemical reaction Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000003197 catalytic effect Effects 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 229910000366 copper(II) sulfate Inorganic materials 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009776 industrial production Methods 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0779—Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
- H05K2203/0786—Using an aqueous solution, e.g. for cleaning or during drilling of holes
- H05K2203/0789—Aqueous acid solution, e.g. for cleaning or etching
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Electroplating Methods And Accessories (AREA)
Abstract
Description
技术领域technical field
本发明属于印制电路板制作领域，具体涉及一种印制电路板精细线路的制作方法。The invention belongs to the field of printed circuit board manufacture, and in particular relates to a method for manufacturing fine lines of a printed circuit board.
背景技术Background technique
随着电子设备的小型化，电子元件的体积越来越小、排列密度越来越高，这就要求作为电子元件载体的线路板有更小的线宽线距；同时高频信号的传输以及对传输信号完整度的要求对电路板的线路阻抗设计提出了更高的要求，对应的线路图形应该有更小的侧蚀、更少的缺陷、更好的完整度。With the miniaturization of electronic equipment, the volume of electronic components is getting smaller and higher, and the arrangement density is getting higher and higher, which requires the circuit board as the carrier of electronic components to have smaller line width and line spacing; at the same time, the transmission of high-frequency signals and The requirements for the integrity of the transmission signal put forward higher requirements for the line impedance design of the circuit board, and the corresponding line pattern should have smaller side erosion, fewer defects, and better integrity.
目前电路板精细线路的制作方法主要有三种：减成法、半加成法、全加成法。减成法是目前应用最广泛的方法，但其曝光、显影、蚀刻工序在制作精细线路时存在多种限制，如：干膜的分辨率、结合力，菲林的分辨率，曝光机的分辨率，蚀刻产生的线路侧蚀，盲孔填充对面铜厚度的影响等都限制了其在精细线路制作中的应用。全加成法需要在材料表面产生催化层，对基材有特殊的要求，且其采用化学方法形成线路层、填盲孔等都对镀液有极高的要求，生产成本高，限制了其在精细线路制作中的应用。半加成法在精细线路制作中有较广泛的应用，其制作的精细线路的完整度和成本都比较容易接受。传统的半加成法是在薄铜层(种子层)贴感光干膜、曝光、显影形成电镀阻挡层，再图形电镀形成线路，最后全板减铜蚀刻，去除种子层得到电镀产生的图形线路。该方法在去除种子层时，蚀刻液可能会流向精细线路图形侧面，造成线路底部与侧面向内产生凹蚀，精细线路发生侧蚀，使得到的精细线路不完整。At present, there are three main methods for making fine circuits on circuit boards: subtractive method, semi-additive method, and full-additive method. The subtractive method is currently the most widely used method, but its exposure, development, and etching processes have many limitations in the production of fine lines, such as: the resolution and bonding force of the dry film, the resolution of the film, and the resolution of the exposure machine , The side erosion of the line caused by etching, the influence of blind hole filling on the thickness of copper on the surface, etc. all limit its application in the production of fine lines. The full addition method needs to generate a catalytic layer on the surface of the material, which has special requirements for the substrate, and it uses chemical methods to form a circuit layer and fill blind holes, etc., which have extremely high requirements for the plating solution, and the high production cost limits its use. Application in fine line production. The semi-additive method is widely used in the production of fine circuits, and the integrity and cost of the fine circuits produced by it are relatively acceptable. The traditional semi-additive method is to paste a photosensitive dry film on the thin copper layer (seed layer), expose and develop to form an electroplating barrier layer, and then pattern electroplating to form a circuit. Finally, the entire board is copper-reduced and etched, and the seed layer is removed to obtain a graphic circuit produced by electroplating. . When removing the seed layer in this method, the etchant may flow to the side of the fine circuit pattern, causing the bottom and side of the circuit to be etched inward, and the fine circuit to be side-etched, so that the obtained fine circuit is incomplete.
申请号为201310460513.6的中国专利公开了“一种印制电路板盲孔和精细线路的加工方法”。该方法通过激光烧蚀形成线路凹槽，然后在板面和凹槽表面化学镀一层种子铜层，再贴感光干膜并曝光、显影形成电镀阻挡层，通过电镀填线路凹槽和盲孔，最后退膜、蚀刻形成精细线路。该方法是在基板上烧蚀出线路凹槽，然后在凹槽内制作线路，通过该方法能有效避免线路的侧蚀问题，但由于基材表面的材质差异以及激光烧蚀的能量不易控制，很难得到完整规则的精细线路凹槽，且激光烧蚀耗时、成本高、效率低、难以实现大批量工业化生产。The Chinese patent application number 201310460513.6 discloses "a method for processing blind holes and fine lines of printed circuit boards". In this method, circuit grooves are formed by laser ablation, and then a seed copper layer is chemically plated on the surface of the board and the grooves, and then a photosensitive dry film is pasted, exposed and developed to form an electroplating barrier layer, and the circuit grooves and blind holes are filled by electroplating , and finally remove the film and etch to form fine lines. This method is to ablate the circuit groove on the substrate, and then make the circuit in the groove. This method can effectively avoid the problem of side erosion of the circuit, but due to the difference in the material of the substrate surface and the energy of laser ablation is not easy to control, It is difficult to obtain complete and regular fine circuit grooves, and laser ablation is time-consuming, costly, and inefficient, making it difficult to achieve mass industrial production.
发明内容Contents of the invention
本发明针对背景技术存在的缺陷，提出了一种印制电路板精细线路的制作方法。该方法操作简单，成本低，效率高，有效解决了精细线路的侧蚀问题，得到的精细线路有较好的完整性且形状规则。Aiming at the defects in the background technology, the present invention proposes a method for manufacturing fine lines of a printed circuit board. The method is simple in operation, low in cost and high in efficiency, effectively solves the side erosion problem of fine lines, and the obtained fine lines have better integrity and regular shape.
本发明的技术方案如下：Technical scheme of the present invention is as follows:
一种印制电路板精细线路的制作方法，包括以下步骤：A method for manufacturing fine lines of a printed circuit board, comprising the following steps:
步骤1：在不含铜的基材110表面贴第一干膜111，然后进行曝光、显影处理，得到精细线路凹槽113；Step 1: paste the first dry film 111 on the surface of the copper-free substrate 110, and then perform exposure and development treatments to obtain fine circuit grooves 113;
步骤2：在经步骤1处理后的基材表面进行镀铜处理，使第一干膜111的上表面及精细线路凹槽113的内表面形成铜种子层210；Step 2: Copper plating is performed on the surface of the substrate treated in step 1 to form a copper seed layer 210 on the upper surface of the first dry film 111 and the inner surface of the fine line groove 113;
步骤3：在经步骤2处理后得到的铜种子层表面贴第二干膜112，然后进行曝光、显影处理，露出精细线路凹槽113；Step 3: paste the second dry film 112 on the surface of the copper seed layer obtained after the treatment in step 2, and then perform exposure and development treatment to expose the fine line groove 113;
步骤4：对经步骤3处理后的基材进行电镀填铜处理，将精细线路凹槽113填充满；Step 4: Carry out electroplating and copper filling treatment on the base material treated in step 3, and fill the fine line groove 113;
步骤5：对经步骤4处理后的基材进行去膜处理，除去第二干膜112，然后进行快速蚀刻，去除第一干膜111上的铜种子层，再进行去膜处理，除去第一干膜111，完成精细线路的制作。Step 5: Carry out film removal treatment on the base material treated in step 4, remove the second dry film 112, and then perform rapid etching to remove the copper seed layer on the first dry film 111, and then perform film removal treatment to remove the first dry film 111. The dry film 111 completes the production of fine lines.
进一步地，步骤1中所述的基材由环氧树脂、酚醛树脂、聚四氟乙烯中的一种或几种与玻璃纤维布组成。Further, the substrate described in step 1 is composed of one or more of epoxy resin, phenolic resin, polytetrafluoroethylene and glass fiber cloth.
进一步地，上述第一干膜111为耐酸性抗蚀干膜，其厚度为30～50μm；上述第二干膜112为耐酸性抗蚀干膜，其厚度为10～30μm。Further, the above-mentioned first dry film 111 is an acid-resistant and anti-corrosion dry film with a thickness of 30-50 μm; the above-mentioned second dry film 112 is an acid-resistant and anti-corrosion dry film with a thickness of 10-30 μm.
进一步地，步骤2中在基材表面进行镀铜处理前，先对基材进行去油、粗化、预浸和活化处理。Further, before performing copper plating treatment on the surface of the substrate in step 2, the substrate is firstly subjected to degreasing, roughening, pre-soaking and activation treatments.
进一步地，步骤2中所述的铜种子层210采用化学镀铜的方法得到，且该铜种子层的厚度为1～3μm。Further, the copper seed layer 210 described in step 2 is obtained by electroless copper plating, and the thickness of the copper seed layer is 1-3 μm.
进一步地，步骤2中在基材表面进行镀铜处理时采用的镀液为酸性镀液。Further, the plating solution used when performing copper plating on the surface of the substrate in step 2 is an acidic plating solution.
进一步地，步骤4中对基材进行电镀填铜处理时采用的镀液中H2SO4的质量浓度为40～60g/L，CuSO4·5H2O的质量浓度为180～210g/L；电镀填铜处理的电镀时间为30～60min，电流密度为1.0～1.2A/dm2。Further, in step 4, the mass concentration of H 2 SO 4 in the plating solution used when the base material is electroplated and filled with copper is 40-60 g/L, and the mass concentration of CuSO 4 ·5H 2 O is 180-210 g/L; The electroplating time of the electroplating copper filling treatment is 30-60 minutes, and the current density is 1.0-1.2 A/dm 2 .
进一步地，步骤5中去膜处理所用的去膜液为NaOH溶液。步骤5中快速蚀刻所使用的蚀刻液为H2SO4-H2O2蚀刻液。Further, the film removal solution used in the film removal treatment in step 5 is NaOH solution. The etchant used for rapid etching in step 5 is H 2 SO 4 -H 2 O 2 etchant.
本发明的有益效果为：The beneficial effects of the present invention are:
1、本发明提供的印制电路板精细线路的制作方法是通过贴干膜并曝光显影形成精细线路凹槽，然后再进行沉积铜种子层、贴干膜、电镀填铜、去膜、快速蚀刻等处理，采用本发明方法不仅能大大减小线路的线宽和线距，还能有效避免去除铜种子层时产生的侧蚀问题。1. The manufacturing method of the printed circuit board fine circuit provided by the present invention is to form fine circuit grooves by pasting a dry film, exposing and developing, and then depositing a copper seed layer, pasting a dry film, electroplating and filling copper, removing the film, and rapid etching etc., adopting the method of the present invention can not only greatly reduce the line width and line spacing of the circuit, but also effectively avoid the problem of side erosion when removing the copper seed layer.
2、本发明提供的精细线路的制作方法操作简便，成本低，避免使用昂贵复杂的设备；且该方法形成的精细线路凹槽形状规整，克服了激光烧蚀形成的凹槽形状不规则的问题，得到的线路形状完整，与设计的线宽匹配，满足阻抗要求。2. The manufacturing method of the fine line provided by the present invention is easy to operate, low in cost, and avoids the use of expensive and complicated equipment; and the fine line groove formed by the method is regular in shape, which overcomes the problem of irregular shape of the groove formed by laser ablation , the shape of the obtained line is complete, matches the designed line width, and meets the impedance requirement.
附图说明Description of drawings
图1为本发明所述的在基材表面贴干膜并曝光显影后得到的精细线路凹槽的示意图。Fig. 1 is a schematic diagram of fine circuit grooves obtained after pasting a dry film on the surface of a substrate and exposing and developing according to the present invention.
图2为本发明步骤2所述在基材表面镀铜处理后的基材的结构示意图。FIG. 2 is a schematic structural view of the substrate after copper plating on the surface of the substrate as described in step 2 of the present invention.
图3为本发明所述在铜种子层表面贴干膜并曝光显影得到的基材的结构示意图。Fig. 3 is a schematic structural view of the substrate obtained by pasting a dry film on the surface of the copper seed layer according to the present invention and exposing and developing.
图4为本发明所述对基材进行电镀填铜处理后的结构示意图。FIG. 4 is a schematic structural view of the substrate after electroplating copper filling treatment according to the present invention.
图5为采用本发明方法制作得到的印制电路板精细线路的示意图。Fig. 5 is a schematic diagram of the fine circuit of the printed circuit board manufactured by the method of the present invention.
其中，110为基材，111为第一干膜，112为第二干膜，113为精细线路凹槽，210为铜种子层，310为电镀铜层。Wherein, 110 is a base material, 111 is a first dry film, 112 is a second dry film, 113 is a fine circuit groove, 210 is a copper seed layer, and 310 is an electroplated copper layer.
具体实施方式detailed description
下面结合附图和实施例对本发明作进一步地说明。The present invention will be further described below in conjunction with the accompanying drawings and embodiments.
实施例Example
一种印制电路板精细线路的制作方法，包括以下步骤：A method for manufacturing fine lines of a printed circuit board, comprising the following steps:
步骤1：在不含铜的基材110表面贴第一干膜111，然后进行曝光、显影处理，得到精细线路凹槽113，如图1所示；Step 1: Paste a first dry film 111 on the surface of a copper-free substrate 110, and then perform exposure and development treatments to obtain fine circuit grooves 113, as shown in Figure 1;
步骤2：在经步骤1处理后的基材表面进行镀铜处理，使第一干膜111的上表面及精细线路凹槽113的内表面形成铜种子层210，如图2所示；Step 2: Copper plating is performed on the surface of the substrate treated in step 1 to form a copper seed layer 210 on the upper surface of the first dry film 111 and the inner surface of the fine line groove 113, as shown in FIG. 2 ;
步骤3：在经步骤2处理后得到的铜种子层表面贴第二干膜112，然后进行曝光、显影处理，露出精细线路凹槽113，如图3所示；Step 3: Paste the second dry film 112 on the surface of the copper seed layer obtained after the treatment in step 2, and then perform exposure and development treatment to expose the fine line groove 113, as shown in Figure 3;
步骤4：对经步骤3处理后的基材进行电镀填铜处理，将精细线路凹槽113填充满，如图4所示；Step 4: Carry out electroplating and copper filling treatment on the substrate treated in step 3, and fill the fine line groove 113, as shown in FIG. 4 ;
步骤5：对经步骤4处理后的基材进行去膜处理，除去第二干膜112，然后进行快速蚀刻，去除第一干膜111上的铜种子层，再进行去膜处理，除去第一干膜111，完成精细线路的制作，如图5所示。Step 5: Carry out film removal treatment on the base material treated in step 4, remove the second dry film 112, and then perform rapid etching to remove the copper seed layer on the first dry film 111, and then perform film removal treatment to remove the first dry film 111. The dry film 111 completes the production of fine lines, as shown in FIG. 5 .
进一步地，步骤1中所述不含铜的基材110由环氧树脂、酚醛树脂、聚四氟乙烯中的一种或几种与玻璃纤维布组成，所述不含铜的基材110可以是单面不含铜，即在不含铜的一面制作精细线路，也可以是双面都不含铜，则可在两面均制作精细线路。Further, the copper-free substrate 110 in step 1 is composed of one or more of epoxy resin, phenolic resin, polytetrafluoroethylene and glass fiber cloth, and the copper-free substrate 110 can be One side does not contain copper, that is, fine lines are made on the side that does not contain copper, or both sides do not contain copper, and fine lines can be made on both sides.
为保证能在酸性中化学沉铜，所述第一干膜111为耐酸性抗蚀干膜，为保证线路凹槽深度，第一干膜的厚度为30～50μm。In order to ensure the chemical deposition of copper in acid, the first dry film 111 is an acid-resistant and anti-corrosion dry film. In order to ensure the depth of the line groove, the thickness of the first dry film is 30-50 μm.
步骤1中所述曝光处理采用激光直接成像系统完成。具体地，在不含铜的基材110表面贴第一干膜111后，采用激光直接成像方法使基材表面的第一干膜发生曝光化学反应，显影后去除未发生光化学反应的干膜，从而露出精细线路凹槽113。The exposure treatment described in step 1 is completed using a laser direct imaging system. Specifically, after attaching the first dry film 111 on the surface of the copper-free substrate 110, the first dry film on the surface of the substrate is exposed to a chemical reaction by using a laser direct imaging method, and the dry film that has not undergone photochemical reaction is removed after development. Thus, the fine line groove 113 is exposed.
步骤2中所述在基材表面进行镀铜处理前，先对基材进行去油、粗化、预浸和活化处理，所述化学沉铜得到的铜种子层的厚度为1～3μm。为保证干膜的稳定性，其所有工艺均在酸性或中性体系下进行。In step 2, before the copper plating treatment on the surface of the substrate, the substrate is degreased, roughened, pre-soaked and activated, and the thickness of the copper seed layer obtained by electroless copper deposition is 1-3 μm. In order to ensure the stability of the dry film, all processes are carried out under acidic or neutral systems.
步骤3中所述的第二干膜112为耐酸性抗蚀干膜，为保证曝光线路精度，其厚度为10～30μm。The second dry film 112 described in step 3 is an acid-resistant dry resist film, and its thickness is 10-30 μm in order to ensure the accuracy of the exposure line.
步骤3中所述的曝光处理采用激光直接成像系统完成。具体地，在经过步骤2处理后得到的铜种子层表面贴第二干膜后，采用激光直接成像法进行曝光，使非线路部分表面的干膜发生光化学反应，显影后去除精细线路凹槽部分未发生反应的干膜，从而露出精细线路凹槽113。The exposure processing described in step 3 is completed by using a laser direct imaging system. Specifically, after the second dry film is pasted on the surface of the copper seed layer obtained after the treatment in step 2, the laser direct imaging method is used for exposure, so that the dry film on the surface of the non-circuit part undergoes a photochemical reaction, and the fine circuit groove part is removed after development. The unreacted dry film exposes the fine line grooves 113 .
步骤4中对基材进行电镀填铜处理时采用的镀液中H2SO4的质量浓度为40～60g/L，CuSO4·5H2O的质量浓度为180～210g/L；电镀填铜处理的电镀时间为30～60min，电流密度为1.0～1.2A/dm2。In step 4 , the mass concentration of H2SO4 in the plating solution used when the substrate is electroplated and filled with copper is 40-60g/L, and the mass concentration of CuSO4 · 5H2O is 180-210g/L; The electroplating time for treatment is 30-60 minutes, and the current density is 1.0-1.2 A/dm 2 .
进一步地，步骤5中去膜处理所用的去膜液为NaOH溶液，步骤5中快速蚀刻所使用的蚀刻液为H2SO4-H2O2蚀刻液。Further, the film-removing solution used in step 5 is NaOH solution, and the etching solution used in step 5 for rapid etching is H 2 SO 4 -H 2 O 2 etching solution.
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