Lamini et al., 2018 - Google Patents
Precision analysis with analytical bit‐width optimisation process for linear circuits with feedbacksLamini et al., 2018
View HTML- Document ID
- 13106567637148748098
- Author
- Lamini E
- Tagzout S
- Belbachir H
- Belouchrani A
- Publication year
- Publication venue
- IET Circuits, Devices & Systems
External Links
Snippet
Finding the best possible word length to accuracy trade off seems to be an obvious design task. However, the literature and carful design reviews show that word lengths are often overestimated to put the data accuracy at the safe side. This study proposes a mathematical …
- 238000000034 method 0 title abstract description 25
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
- G06F17/5036—Computer-aided design using simulation for analog modelling, e.g. for circuits, spice programme, direct methods, relaxation methods
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
- G06F17/504—Formal methods
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/11—Complex mathematical operations for solving equations, e.g. nonlinear equations, general mathematical optimization problems
- G06F17/13—Differential equations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5045—Circuit design
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5068—Physical circuit design, e.g. layout for integrated circuits or printed circuit boards
- G06F17/5081—Layout analysis, e.g. layout verification, design rule check
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/18—Complex mathematical operations for evaluating statistical data, e.g. average values, frequency distributions, probability functions, regression analysis
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/30—Information retrieval; Database structures therefor; File system structures therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/20—Handling natural language data
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2217/00—Indexing scheme relating to computer aided design [CAD]
- G06F2217/78—Power analysis and optimization
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F19/00—Digital computing or data processing equipment or methods, specially adapted for specific applications
- G06F19/10—Bioinformatics, i.e. methods or systems for genetic or protein-related data processing in computational molecular biology
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Kaufmann et al. | Verifying large multipliers by combining SAT and computer algebra | |
Fang et al. | Toward efficient static analysis of finite-precision effects in DSP applications via affine arithmetic modeling | |
Farahmandi et al. | Gröbner basis based formal verification of large arithmetic circuits using gaussian elimination and cone-based polynomial extraction | |
Wu et al. | An efficient method for calculating the error statistics of block-based approximate adders | |
Chandrasekharan et al. | Precise error determination of approximated components in sequential circuits with model checking | |
Sarbishei et al. | Analytical optimization of bit-widths in fixed-point LTI systems | |
US20190095303A1 (en) | Systems and methods for measuring error in terms of unit in last place | |
US10936769B2 (en) | Systems and methods for measuring error in terms of unit in last place | |
Sengupta et al. | SABER: Selection of approximate bits for the design of error tolerant circuits | |
Del Barrio et al. | Multispeculative addition applied to datapath synthesis | |
Tlelo-Cuautle et al. | VHDL descriptions for the FPGA implementation of PWL-function-based multi-scroll chaotic oscillators | |
Abreu et al. | Bounded model checking for fixed-point digital filters | |
Amat et al. | On two high‐order families of frozen Newton‐type methods | |
Barik et al. | Efficient ASIC and FPGA implementation of cube architecture | |
Singh et al. | Convergence rate of collocation method based on wavelet for nonlinear weakly singular partial integro‐differential equation arising from viscoelasticity | |
Yu et al. | Formal analysis of Galois field arithmetic circuits-parallel verification and reverse engineering | |
Mazahir et al. | Probabilistic error analysis of approximate adders and multipliers | |
Chai et al. | Set membership state estimation with improved zonotopic description of feasible solution set | |
Lamini et al. | Precision analysis with analytical bit‐width optimisation process for linear circuits with feedbacks | |
Das et al. | FPGA and ASIC realisation of EMD algorithm for real‐time signal processing | |
Guan et al. | Formalization of continuous Fourier transform in verifying applications for dependable cyber-physical systems | |
Chen | High‐order Taylor series approximation for efficient computation of elementary functions | |
Yin et al. | Couple of the variational iteration method and Legendre wavelets for nonlinear partial differential equations | |
Ménard et al. | Analysis of finite word-length effects in fixed-point systems | |
Radecka et al. | Arithmetic transforms for compositions of sequential and imprecise datapaths |