Nothing Special   »   [go: up one dir, main page]

Joly et al., 2010 - Google Patents

Impact of hump effect on MOSFET mismatch in the sub-threshold area for low power analog applications

Joly et al., 2010

Document ID
5593784150983113131
Author
Joly Y
Lopez L
Portal J
Aziza H
Bert Y
Julien F
Fornara P
Publication year
Publication venue
2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology

External Links

Snippet

Analog circuit designs are often biased to work in sub-threshold mode with good gate- source voltage matching performances. Depending on the process, hump effect may change the MOS characteristics for negative Bulk-Source Voltage (VBS) and have a slight impact for …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Complementary MIS field-effect transistors
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits

Similar Documents

Publication Publication Date Title
Magnelli et al. A 2.6 nW, 0.45 V temperature-compensated subthreshold CMOS voltage reference
KR101645449B1 (en) Current reference circuit
US8072259B1 (en) Voltage reference and supply voltage level detector circuits using proportional to absolute temperature cells
Lu et al. Universal charge-conserving TFET SPICE model incorporating gate current and noise
Joly et al. Impact of hump effect on MOSFET mismatch in the sub-threshold area for low power analog applications
Cheng Comparison of MOSFET threshold voltage extraction methods with temperature variation
Mahato et al. Impact of transistor aging on RF low noise amplifier performance of 28nm technology: Reliability assessment
CN103941068A (en) On-chip sensor for measuring threshold voltage drifting
US8524513B2 (en) Measuring floating body voltage in silicon-on-insulator (SOI) metal-oxide-semiconductor-field-effect-transistor (MOSFET)
Nyssens et al. Self-heating in 28 FDSOI UTBB MOSFETs at cryogenic temperatures
Joly et al. Matching degradation of threshold voltage and gate voltage of NMOSFET after Hot Carrier Injection stress
Karatsori et al. Drain current local variability from linear to saturation region in 28 nm bulk NMOSFETs
Le et al. Large-Signal Modeling for Nonlinear Analysis of Experimental Devices in 22nm FDSOI Technology
Devoge et al. Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology
Osman et al. An extended tanh law MOSFET model for high temperature circuit simulation
Dutta et al. BSIM6--Benchmarking the Next-Generation MOSFET Model for RF Applications
Ruangphanit et al. The effects of temperature and device demension of MOSFETs on the DC characteristics of CMOS inverter
Joly et al. Octagonal MOSFET: Reliable device for low power analog applications
Tang et al. Investigation and modeling of hot carrier effects on performance of 45-and 55-nm NMOSFETs with RF automatic measurement
Madhushankara et al. Floating gate Wilson current mirror for low power applications
Castro-González et al. Development of a behavioral model of the single-electron transistor for hybrid circuit simulation
McQuirk et al. Test structures to evaluate the impact of parasitic edge FET on circuits operating in weak inversion
He et al. Systematic characterization of subthreshold-mosfets-based voltage references for ultra low power low voltage applications
KR20090120178A (en) Method for testing semiconductor memory device
Joly et al. Temperature and hump effect impact on output voltage spread of low power bandgap designed in the sub-threshold area