A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.

Autonomous pre-boot DMA attack hardware implant for M.2 slot based on PicoEVB development board

DMA attacks over PCI Express based on Xilinx Zynq-7000 series SoC

C++ library for AXI DMA with direct and scatter-gather support

Example of transfer UDP packets from AXI DMA with SG mode.

Tutorials or projects example to use Vivado 2019.2 and Vitis

Simple API for working with AXI DMA on Zynq-7000

LTC2324-16 driver for Xilinx AXI-DMA