A wide band differentially switch-tuned CMOS monolithic quadrature VCO with a low Kvco and high linearity
A wide band, differentially switch-tuned CMOS monolithic LC-VCO is presented in this paper, as well as a frequency divider for high linearity, low Kvco quadrature signal generation. A linearity control logic is proposed. The Kvco linearity is improved ...
Capacitive humidity sensors based on MWCNTs/polyelectrolyte interfaces deposited on flexible substrates
Inexpensive humidity sensors operating at room temperature are developed by casting on glossy paper linearly shaped carbon nanotubes electrodes, spaced by few hundreds microns, and sensitive layers consisting of iron oxide nanopowder dispersed in a ...
Thermal behavior Spice study of 6H-SiC NMOS transistors
Silicon carbide is a material that is undergoing major advances associated with a broad scope in the field of electronics. The main properties of silicon carbide such as its high thermal conductivity and high band gap make it a material suitable for use ...
Ultra wideband, low-power, 3-5.6GHz, CMOS voltage-controlled oscillator
In this paper, a low-power inductorless ultra wideband (UWB) CMOS voltage-controlled oscillator is designed in TSMC 0.18@mm CMOS technology as a part of a ultra wideband FM (UWBFM) transmitter. The VCO includes a current-controlled oscillator (CCO) ...
Analytical timing model for inductance-dominant interconnect based on traveling wave propagation
As accurate and efficient timing prediction is very important for integrated circuit design, an analytical timing model for inductive-effect dominated resistance-inductance-capacitance (RLC) transmission line with resistive driver and capacitive load is ...
Effects of dimensions on the sensitivity of a conducting polymer microwire sensor
It is commonly considered that the sensitivity of a microsensor increases with its increasing surface-to-volume ratio. However, it is not exactly clear how the surface-to-volume ratio affects the sensitivity of a conducting polymer microsensor. The ...
A BJT technology-based current-mode tunable all-pass filter
In this paper, a new bipolar technology-based configuration for providing inverting first-order current-mode (CM) all-pass filter response is proposed. One of the main advantages of the introduced active C topology is to have the property of electronic ...
Novel floating simulated inductors with wider operating-frequency ranges
In this paper, a number of simulated floating inductors (FIs) employing second-generation current conveyor (CCII), current-feedback operational amplifier (CFOA), differential voltage current conveyor (DVCC) and differential difference current conveyor (...
Low cost bulk-silicon CDMOS technology and enhanced dv/dt high voltage driver circuit for PDP data driver IC
In this paper, a 256-channel data driver IC for plasma display panels (PDPs) is proposed. A new low cost 0.5@mm bulk-silicon CDMOS (CMOS and DMOS) technology is developed, resulting in the improvement of input data frequency up to 120MHz and reduction ...
Implementation of low-voltage static RAM with enhanced data stability and circuit speed
This paper presents a novel SRAM circuit technique for simultaneously enhancing the cell operating margin and improving the circuit speed in low-voltage operation. During each access, the wordline and cell power node of selected SRAM cells are ...
A new compensation mechanism for environmental parameter fluctuations in CMOS digital ICs
Process-induced and environmental fluctuations play an important role in the design process for modern high-performance integrated circuits. The conventional principle of considering the verification of worst-case requirements reduces the performance ...
De-embedding method for on-wafer RF CMOS inductor measurements
In this work, an accurate de-embedding method for on-wafer RF measurements of CMOS large area devices like the inductors is presented. The method uses distributed and lumped-element models to represent the parasitic elements. The interconnect parasitics ...
High-performance active polyphase filter design for digital TV tuner
This paper presents the polyphase filter design for the tuner of DTV front-end system. The polyphase filter is designed with an active circuit to improve the chip performance. Most of passive capacitor and resistor components are replaced with MOS ...
Ultra-low power 32-bit pipelined adder using subthreshold source-coupled logic with 5fJ/stage PDP
This article presents a new approach for improving the power-delay performance of subthreshold source-couple logic (STSCL) circuits. Using a simple two-phase pipelining technique, it is possible to increase the activity rate of STSCL gates with ...
Performance comparison of CNFET- and CMOS-based 6T SRAM cell in deep submicron
This paper presents a performance comparison of a carbon nanotube-based field effect (CNFET)- and CMOS-based 6T SRAM cell at the 32nm technology node. HSPICE simulations, carried out using Berkeley predictive technology model (BPTM), show that for a ...
Design of a tunable multi-band differential LC VCO using 0.35µm SiGe BiCMOS technology for multi-standard wireless communication systems
In this paper, an integrated 2.2-5.7GHz multi-band differential LC VCO for multi-standard wireless communication systems was designed utilizing 0.35@mm SiGe BiCMOS technology. The topology, which combines the switching inductors and capacitors together ...
Pseudorandom signal sampler for relaxed design of multistandard radio receiver
This paper proposes a novel software defined radio (SDR) receiver design using non-uniform sampling (NUS) technique implemented by original design of a pseudorandom signal sampler (PSS) circuit for controlling data conversion to relax multistandard ...
Single Event crosstalk shielding for CMOS logic
With advances in technology scaling, CMOS circuits are increasingly more sensitive to transient pulses caused by Single Event particles. Hardening techniques for CMOS combinational logic have been developed to address the problems associated with Single ...
Design of SCR-based ESD protection device for power clamp using deep-submicron CMOS technology
The proposed device has a high holding voltage and a high triggering current characteristic. These characteristics enable latch-up immune normal operation as well as superior full chip electro-static-discharge (ESD) protection. The device has a small ...
Temperature-adaptive voltage scaling for enhanced energy efficiency in subthreshold memory arrays
Static random access memory (SRAM) circuits optimized for minimum energy consumption typically operate in the subthreshold regime with ultra low-power-supply voltages. Both the read and the write propagation delays of a subthreshold memory circuit are ...
A very-high output impedance charge pump for low-voltage low-power PLLs
This article presents the design of a high output compliance, very-high output impedance single-ended charge pump implemented using a new low-voltage current mirror. The output current is sampled and a feedback loop forces it to be equal to the desired ...
IDEA and AES, two cryptographic algorithms implemented using partial and dynamic reconfiguration
In this work, we present our experience in implementing two different cryptographic algorithms in an FPGA: IDEA and AES. Both implementations have been done by means of mixing Handel-C and VHDL and using partial and dynamic reconfiguration in order to ...