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editorial
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Editorial: A Message from the New Editor-in-Chief
Article No.: 49e, Pages 1–2https://doi.org/10.1145/3419376
research-article
LDE-aware Analog Layout Migration with OPC-inclusive Routing
Article No.: 49, Pages 1–22https://doi.org/10.1145/3398190

Performance degradation in analog circuits due to layout dependent effects (LDEs) has become increasingly challenging in advanced technologies. To address this issue, LDEs have to be seriously considered as performance constraints in the physical design ...

research-article
MNFTL: An Efficient Flash Translation Layer for MLC NAND Flash Memory
Article No.: 50, Pages 1–19https://doi.org/10.1145/3398037

The write constraints of Multi-Level Cell (MLC) NAND flash memory make most of the existing flash translation layer (FTL) schemes inefficient or inapplicable. In this article, we solve several fundamental problems in the design of MLC flash translation ...

research-article
A Locality Optimizer for Loop-dominated Applications Based on Reuse Distance Analysis
Article No.: 51, Pages 1–26https://doi.org/10.1145/3398189

Source code optimization can heavily improve software code implementation quality while still being complementary to conventional compilers’ optimizations. Source code analysis tools are very useful in supporting source code optimization. This article ...

research-article
Public Access
Energy-Efficient GPU L2 Cache Design Using Instruction-Level Data Locality Similarity
Article No.: 52, Pages 1–18https://doi.org/10.1145/3408060

This article presents a novel energy-efficient cache design for massively parallel, throughput-oriented architectures like GPUs. Unlike L1 data cache on modern GPUs, L2 cache shared by all of the streaming multiprocessors is not the primary performance ...

research-article
Reconfigurable Network-on-Chip Security Architecture
Article No.: 53, Pages 1–25https://doi.org/10.1145/3406661

Growth of the Internet-of-things has led to complex system-on-chips (SoCs) being used in the edge devices in IoT applications. The increased complexity is demanding designers to consider several critical factors, such as dynamic requirement changes, ...

research-article
Interval Arithmetic and Self-Similarity Based RTL Input Vector Control for Datapath Leakage Minimization
Article No.: 54, Pages 1–26https://doi.org/10.1145/3408061

With technology scaling, subthreshold leakage has dominated the overall power consumption in a design. Input vector control is an effective technique to minimize subthreshold leakage. Low leakage input vector determination is not often possible due to ...

research-article
Wire Load Oriented Analog Routing with Matching Constraints
Article No.: 55, Pages 1–26https://doi.org/10.1145/3403932

As design complexity is increased exponentially, electronic design automation (EDA) tools are essential to reduce design efforts. However, the analog layout design has still been done manually for decades because it is a sensitive and error-prone task. ...

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