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Design and Implementation of Warbler Family of Lightweight Pseudorandom Number Generators for Smart Devices
With the advent of ubiquitous computing and the Internet of Things (IoT), the security and privacy issues for various smart devices such as radio-frequency identification (RFID) tags and wireless sensor nodes are receiving increased attention from ...
Design of a High-Performance CDMA-Based Broadcast-Free Photonic Multi-Core Network on Chip
Present-day focus on multicore research has not only increased computing power but also power- and bandwidth-efficient communication among cores. On-chip communication networks have become popular today because of their low energy use and modular ...
Beyond Cross-Section: Spatio-Temporal Reliability Analysis
A computational system employed in safety-critical applications typically has reliability as a primary concern. Thus, the designer focuses on minimizing the device radiation-sensitive area, often leading to performance degradation. In this article, we ...
Preaveraging and Carry Propagate Approaches to Side-Channel Analysis of HMAC-SHA256
Although HMAC-SHA has been standardized for over a decade, few published attacks on the single-cycle round implementation exist. In this research, new attack techniques are provided, for the first time, (1) to help to discriminate between values of ...
Dynamic Logging with Dylog in Networked Embedded Systems
Event logging is an important technique for networked embedded systems like wireless sensor networks. It can greatly help developers to understand complex system behaviors and diagnose program bugs. Existing logging facilities do not well satisfy three ...
Power-Aware Design Techniques of Secure Multimode Embedded Systems
Nowadays, embedded systems have been widely used in all types of application areas, some of which belong to the safety and reliability critical domains. The functional correctness and design robustness of the embedded systems involved in such domains ...
Energy-Aware Scheduling for Real-Time Systems: A Survey
This article presents a survey of energy-aware scheduling algorithms proposed for real-time systems. The analysis presents the main results starting from the middle 1990s until today, showing how the proposed solutions evolved to address the evolution ...
Error Detector Placement for Soft Computing Applications
The scaling of Silicon devices has exacerbated the unreliability of modern computer systems, and power constraints have necessitated the involvement of software in hardware error detection. At the same time, emerging workloads in the form of soft ...
TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA
This article describes TBES, a software end-to-end environment for synthesizing multitask applications on FPGAs. The implementation follows a template-based approach for creating heterogeneous multiprocessor architectures. Heterogeneity stems from the ...
Theory and Application of Delay Constraints in Arbiter PUF
Physically Unclonable Function (PUF) circuits are often vulnerable to mathematical model-building attacks. We theoretically quantify the advantage provided to an adversary by any training dataset expansion technique along the lines of security analysis ...
A Cache-Based Flash Translation Layer for TLC-Based Multimedia Storage Devices
Current triple-level cell (TLC)-based solids-tate drives used in multimedia storage devices support multichannel access to increase capacity and throughput. Unfortunately, current state-of-the-art FTL algorithms must employ selective caching for ...
Exploiting Page Correlations for Write Buffering in Page-Mapping Multichannel SSDs
Advanced solid-state disks (SSDs) have been equipped with page-mapping flash translation layers and multichannel architectures. The SSDs employ a RAM-based write buffer, which delays write requests for reducing write traffic, reorders requests for ...
Stable Greedy: Adaptive Garbage Collection for Durable Page-Mapping Multichannel SSDs
Commodity solid state drives (SSDs) have recently begun involving the adoption of powerful controllers for multichannel flash management at the page level. However, many of these models still use primitive garbage-collection algorithms, because previous ...
Feasibility of Fork-Join Real-Time Task Graph Models: Hardness and Algorithms
In the formal analysis of real-time systems, modeling of branching codes and modeling of intratask parallelism structures are two of the most important research topics. These two real-time properties are combined, resulting in the fork-join real-time ...
CUDA Leaks: A Detailed Hack for CUDA and a (Partial) Fix
Graphics processing units (GPUs) are increasingly common on desktops, servers, and embedded platforms. In this article, we report on new security issues related to CUDA, which is the most widespread platform for GPU computing. In particular, details and ...
Structure Design of Wireless Sensor Nodes with Energy and Cost Awareness for Multichannel Signal Measurement
This article aims to develop a design pattern of a wireless sensor node working in multichannel signal measurement for effectively lowering energy consumption and cost. The proposed design pattern enables the architecture of a wireless sensor node to ...
User-Centric Scheduling and Governing on Mobile Devices with big.LITTLE Processors
Mobile applications will become progressively more complicated and diverse. Heterogeneous computing architectures like big.LITTLE are a hardware solution that allows mobile devices to combine computing performance and energy efficiency. However, ...
Data Flow Transformation for Energy-Efficient Implementation of Givens Rotation--Based QRD
QR decomposition (QRD), a matrix decomposition algorithm widely used in embedded application domain, can be realized in a large number of valid processing sequences that differ significantly in the number of memory accesses and computations, and hence ...
A Logic-Based Benders Decomposition Approach for Mapping Applications on Heterogeneous Multicore Platforms
The development of efficient methods for mapping applications on heterogeneous multicore platforms is a key issue in the field of embedded systems. In this article, a novel approach based on the Logic-Based Benders decomposition principle is introduced ...
Software-Based Selective Validation Techniques for Robust CGRAs Against Soft Errors
Coarse-Grained Reconfigurable Architectures (CGRAs) are drawing significant attention since they promise both performances with parallelism and flexibility with reconfiguration. Soft errors (or transient faults) are becoming a serious design concern in ...
Attack-Resilient Sensor Fusion for Safety-Critical Cyber-Physical Systems
This article focuses on the design of safe and attack-resilient Cyber-Physical Systems (CPS) equipped with multiple sensors measuring the same physical variable. A malicious attacker may be able to disrupt system performance through compromising a ...