A framework for comparing models of computation
We give a denotational framework (a “meta model”) within which certain properties of models of computation can be compared. It describes concurrent processes in general terms as sets of possible behaviors. A process is determinate if, given ...
Comparison of statistical enhancement methods for Monte Carlo semiconductor simulation
Three methods of variable-weight statistical enhancement for Monte Carlo semiconductor device simulation are compared. The steady-state statistical errors and figures of merit for implementations of the multicomb, cloning-rouletting, and splitting-...
Monte Carlo simulation of silicon amorphization during ion implantation
We present a new analytical model to predict the spatial location of amorphous phases in ion-implanted single-crystalline silicon using results of multidimensional Monte Carlo simulations. Our approach is based on the concept of the critical damage ...
Integrated optimization capabilities in the VISTA technology CAD framework
Advanced analysis features implemented in the Vienna Integrated System for TCAD Applications simulation environment are presented. These functionalities support automatic experiment generation (design of experiments), model fitting (response surface ...
Multiobjective optimization of VLSI interconnect parameters
The significant role played by interconnects in determining the speed and chip size of very-large-scale integrated circuits (VLSI) necessitates the development of new processes and tools for almost every device generation. Since such development usually ...
A layout approach to monolithic microwave IC
A layout approach for monolithic microwave integrated circuits (MMICs) is described, in which layout elements are transistors, inductors, capacitors, resistors, coplanar waveguides, etc., implemented in a GaAs fabrication process. The layout issue ...
High-reliability, low-energy microarchitecture synthesis
Continuous scaling of device dimensions has accelerated the power dissipation and electromigration-induced reliability degradation in integrated circuits. Submicrometer scaling increases the fraction of on-chip energy dissipated on long interconnects ...
Low-power state assignment targeting two- and multilevel logic implementations
The problem of minimizing power consumption during the state encoding of a finite-state machine is addressed. A new power cost model for state encoding is proposed, and encoding techniques that minimize this power cost for two- and multilevel logic ...
JiffyTune: circuit optimization using time-domain sensitivities
Automating the transistor and wire-sizing process is an important step toward being able to rapidly design high-performance, custom circuits. This paper presents a circuit optimization tool that automates the tuning task by means of state-of-the-art ...
Random pattern testability of memory address logic
An analytical method is described for determining the random pattern testability of faults in combinational logic feeding the address inputs of embedded memories. Difference information from replicated copies of embedding logic is used to determine the ...
Retiming DAGs [direct acyclic graph]
This paper is devoted to a low-complexity algorithm for retiming circuits without cycles, i.e., those whose network graph is a direct acyclic graph (DAG). On one hand, DAGs have a great practical importance, as shown by the on-line arithmetic circuits ...
Techniques for minimizing power dissipation in scan and combinational circuits during test application
Reduction of power dissipation during test application is studied for scan designs and for combinational circuits tested using built-in self-test (BIST). The problems are shown to be intractable. Heuristics to solve these problems are discussed. We show ...
Efficient state classification of finite-state Markov chains
This paper presents an efficient method for state classification of finite-state Markov chains using binary-decision diagram-based symbolic techniques. The method exploits the fundamental properties of a Markov chain and classifies the state space by ...