Hans Joachim Wunderlich

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Hans Joachim Wunderlich
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Michael Andreas Kochte (33)
Sybille Hellebrand (31)
Eric Schneider (16)
Stefan Holst (13)
Gundolf Kiefer (12)
Michael E. Imhof (12)
Christian G Zoellin (10)
Bernd W Becker (9)
Rafal Baranowski (8)
Lars Bauer (7)
Paolo Prinetto (7)
Rainer Dorsch (7)
Alejandro Cook (6)
Andre Hertwig (6)
Harald P E Vranken (6)
Huaguo Liang (6)
Stefano Di Carlo (5)
Vyacheslav N Yarmolik (5)
Matthias Sauer (4)

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Journal/Magazine Names

Journal of Electronic Testing: Theory and Applications (17)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (6)
ACM Transactions on Design Automation of Electronic Systems (4)
IEEE Design & Test (3)
IEEE Transactions on Computers (3)
IEEE Embedded Systems Letters (1)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems (1)
Integration, the VLSI Journal (1)
Journal of Computer Science and Technology (1)

Proceedings/Book Names

ATS '15: Proceedings of the 2015 IEEE 24th Asian Test Symposium (ATS) (3)
DATE '01: Proceedings of the conference on Design, automation and test in Europe (3)
DATE '20: Proceedings of the 23rd Conference on Design, Automation and Test in Europe (3)
ITC '00: Proceedings of the 2000 IEEE International Test Conference (3)
ITC '01: Proceedings of the 2001 IEEE International Test Conference (3)
Proceedings of the IEEE International Test Conference 2001 (3)
ATS '10: Proceedings of the 2010 19th IEEE Asian Test Symposium (2)
ATS '12: Proceedings of the 2012 IEEE 21st Asian Test Symposium (2)
ATS '13: Proceedings of the 2013 22nd Asian Test Symposium (2)
DAC '14: Proceedings of the 51st Annual Design Automation Conference (2)
DATE '09: Proceedings of the Conference on Design, Automation and Test in Europe (2)
DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe (2)
DATE '14: Proceedings of the conference on Design, Automation & Test in Europe (2)
DATE '15: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (2)
ETS '07: Proceedings of the 12th IEEE European Test Symposium (2)
ETS '08: Proceedings of the 2008 13th European Test Symposium (2)
ETS '09: Proceedings of the 2009 European Test Symposium (2)
ICCAD '95: Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design (2)
ITC '04: Proceedings of the International Test Conference on International Test Conference (2)
ITC'94: Proceedings of the 1994 international conference on Test (2)

All Publications

Proceedings (115)
Other periodicals (33)
Journals (4)
Books (2)

Content Type

Research Article (46)
Discussion (1)
Opinion (1)
Tutorial (1)

Publisher

IEEE Computer Society (73)
IEEE Press (19)
Kluwer Academic Publishers (18)
Association for Computing Machinery (16)
European Design and Automation Association (8)
EDA Consortium (7)
IEEE Computer Society Press (6)
Springer-Verlag (5)
Elsevier Science Publishers B. V. (1)
IEEE Educational Activities Department (1)

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research-article
A Complete Design-for-Test Scheme for Reconfigurable Scan Networks
- Natalia Lylina
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
  ,
- Chih-Hao Wang
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
  ,
- Hans-Joachim Wunderlich
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
Journal of Electronic Testing: Theory and Applications, Volume 38, Issue 6•Dec 2022, pp 603-621 • https://doi.org/10.1007/s10836-022-06038-3
Abstract
Reconfigurable Scan Networks (RSNs) are widely used for accessing instruments offline during debug, test and validation, as well as for performing system-level-test and online system health monitoring. The correct operation of RSNs is essential, ...
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research-article
Robust reconfigurable scan networks
- Natalia Lylina
  University of Stuttgart, Stuttgart, Germany
  ,
- Chih-Hao Wang
  University of Stuttgart, Stuttgart, Germany
  ,
- Hans-Joachim Wunderlich
  University of Stuttgart, Stuttgart, Germany
DATE '22: Proceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe•March 2022, pp 1149-1152

Reconfigurable Scan Networks (RSNs) access the evaluation results from embedded instruments and control their operation throughout the device lifetime. At the same time, a single fault in an RSN may dramatically reduce the accessibility of the ...
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research-article
Intelligent methods for test and reliability
- H. Amrouch
  University of Stuttgart, Stuttgart, Germany
  ,
- J. Anders
  University of Stuttgart, Stuttgart, Germany
  ,
- S. Becker
  University of Stuttgart, Stuttgart, Germany
  ,
- M. Betka
  University of Stuttgart, Stuttgart, Germany
  ,
- G. Bleher
  Advantest Corporation
  ,
- P. Domanski
  University of Stuttgart, Stuttgart, Germany
  ,
- N. Elhamawy
  University of Stuttgart, Stuttgart, Germany
  ,
- T. Ertl
  University of Stuttgart, Stuttgart, Germany
  ,
- A. Gatzastras
  University of Stuttgart, Stuttgart, Germany
  ,
- P. Genssler
  University of Stuttgart, Stuttgart, Germany
  ,
- S. Hasler
  University of Stuttgart, Stuttgart, Germany
  ,
- M. Heinrich
  Advantest Corporation
  ,
- A. van Hoorn
  University of Stuttgart, Stuttgart, Germany
  ,
- H. Jafarzadeh
  University of Stuttgart, Stuttgart, Germany
  ,
- I. Kallfass
  University of Stuttgart, Stuttgart, Germany
  ,
- F. Klemme
  University of Stuttgart, Stuttgart, Germany
  ,
- S. Koch
  University of Stuttgart, Stuttgart, Germany
  ,
- R. Küsters
  University of Stuttgart, Stuttgart, Germany
  ,
- A. Lalama
  University of Stuttgart, Stuttgart, Germany
  ,
- R. Latty
  University of Stuttgart, Stuttgart, Germany
  ,
- Y. Liao
  University of Stuttgart, Stuttgart, Germany
  ,
- N. Lylina
  University of Stuttgart, Stuttgart, Germany
  ,
- Z. Najafi Haghi
  University of Stuttgart, Stuttgart, Germany
  ,
- D. Pflüger
  University of Stuttgart, Stuttgart, Germany
  ,
- I. Polian
  University of Stuttgart, Stuttgart, Germany
  ,
- J. Rivoir
  Advantest Corporation
  ,
- M. Sauer
  Advantest Corporation
  ,
- D. Schwachhofer
  University of Stuttgart, Stuttgart, Germany
  ,
- S. Templin
  Advantest Corporation
  ,
- C. Volmer
  Advantest Corporation
  ,
- S. Wagner
  University of Stuttgart, Stuttgart, Germany
  ,
- D. Weiskopf
  University of Stuttgart, Stuttgart, Germany
  ,
- H.-J. Wunderlich
  University of Stuttgart, Stuttgart, Germany
  ,
- B. Yang
  University of Stuttgart, Stuttgart, Germany
  ,
- M. Zimmermann
  Advantest Corporation
DATE '22: Proceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe•March 2022, pp 969-974

Test methods that can keep up with the ongoing increase in complexity of semiconductor products and their underlying technologies are an essential prerequisite for maintaining quality and safety of our daily lives and for continued success of our ...
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research-article
Stress-Aware Periodic Test of Interconnects
- Somayeh Sadeghi-Kohan
  Computer Engineering Group EIM/E, University of Paderborn, Paderborn, Germany
  ,
- Sybille Hellebrand
  Computer Engineering Group EIM/E, University of Paderborn, Paderborn, Germany
  ,
- Hans-Joachim Wunderlich
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
Journal of Electronic Testing: Theory and Applications, Volume 37, Issue 5-6•Dec 2021, pp 715-728 • https://doi.org/10.1007/s10836-021-05979-5
Abstract
Safety-critical systems have to follow extremely high dependability requirements as specified in the standards for automotive, air, and space applications. The required high fault coverage at runtime is usually obtained by a combination of ...
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research-article
GPU-accelerated time simulation of systems with adaptive voltage and frequency scaling
- Eric Schneider
  University of Stuttgart, Stuttgart, Germany
  ,
- Hans-Joachim Wunderlich
  University of Stuttgart, Stuttgart, Germany
DATE '20: Proceedings of the 23rd Conference on Design, Automation and Test in Europe•March 2020, pp 879-884

Timing validation of systems with adaptive voltage-and frequency scaling (AVFS) requires an accurate timing model under multiple operating points. Simulating such a model at gate level is extremely time-consuming, and the state-of-the-art compromises ...
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research-article
Using programmable delay monitors for wear-out and early life failure prediction
- Chang Liu
  University of Stuttgart, Stuttgart, Germany
  ,
- Eric Schneider
  University of Stuttgart, Stuttgart, Germany
  ,
- Hans-Joachim Wunderlich
  University of Stuttgart, Stuttgart, Germany
DATE '20: Proceedings of the 23rd Conference on Design, Automation and Test in Europe•March 2020, pp 804-809

Early life failures in marginal devices are a severe reliability threat in current nano-scaled CMOS devices. While small delay faults are an effective indicator of marginalities, their detection requires special efforts in testing by so-called Faster-...
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21
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research-article
Synthesis of fault-tolerant reconfigurable scan networks
- Sebastian Brandhofer
  University of Stuttgart, Stuttgart, Germany
  ,
- Michael A. Kochte
  University of Stuttgart, Stuttgart, Germany
  ,
- Hans-Joachim Wunderlich
  University of Stuttgart, Stuttgart, Germany
DATE '20: Proceedings of the 23rd Conference on Design, Automation and Test in Europe•March 2020, pp 798-803

On-chip instrumentation is mandatory for efficient bring-up, test and diagnosis, post-silicon validation, as well as in-field calibration, maintenance, and fault tolerance. Reconfigurable scan networks (RSNs) provide a scalable and efficient scan-based ...
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research-article
Built-In Test for Hidden Delay Faults
- Matthias Kampmann
  Institute of Electrical Engineering and Information Technology, University of Paderborn, Paderborn, Germany
  ,
- Michael A. Kochte
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, German
  ,
- Chang Liu
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, German
  ,
- Eric Schneider
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, German
  ,
- Sybille Hellebrand
  Institute of Electrical Engineering and Information Technology, University of Paderborn, Paderborn, Germany
  ,
- Hans-Joachim Wunderlich
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, German
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 38, Issue 10•Oct. 2019, pp 1956-1968 • https://doi.org/10.1109/TCAD.2018.2864255
Marginal hardware introduces severe reliability threats throughout the life cycle of a system. Although marginalities may not affect the functionality of a circuit immediately after manufacturing, they can degrade into hard failures and must be screened ...
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research-article
SWIFT: Switch-Level Fault Simulation on GPUs
- Eric Schneider
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
  ,
- Hans-Joachim Wunderlich
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 38, Issue 1•Jan. 2019, pp 122-135 • https://doi.org/10.1109/TCAD.2018.2802871
Current nanometer CMOS circuits show an increasing sensitivity to deviations in first-order parameters and suffer from process variations during manufacturing. To properly assess and support test validation of digital designs, low-level fault simulation ...
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opinion
Guest Editors’ Introduction
- Sybille Hellebrand
  Paderborn University, Paderborn, Germany
  ,
- Jorg Henkel
  Karlsruhe Institute of Technology, Karlsruhe, Germany
  ,
- Anand Raghunathan
  Purdue University, West Lafayette, IN, Germany
  ,
- Hans-Joachim Wunderlich
  University of Stuttgart, Stuttgart, Germany
IEEE Embedded Systems Letters, Volume 10, Issue 1•March 2018, pp 1-1 • https://doi.org/10.1109/LES.2018.2789942

Approximate computing exploits the inherent error resilience of many applications to optimize power consumption, run time, or chip area. Especially in audio, image, and video processing, but also in data mining or resource allocation tasks, approximate ...
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research-article
Multi-level timing simulation on GPUs
- Eric Schneider
  University of Stuttgart, Stuttgart, Germany
  ,
- Michael A. Kochte
  University of Stuttgart, Stuttgart, Germany
  ,
- Hans-Joachim Wunderlich
  University of Stuttgart, Stuttgart, Germany
ASPDAC '18: Proceedings of the 23rd Asia and South Pacific Design Automation Conference•January 2018, pp 470-475

Timing-accurate simulation of circuits is an important task in design validation of modern nano-scale CMOS circuits. With shrinking technology nodes, detailed simulation models down to transistor level have to be considered. While conventional ...
0Citation
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research-article
Multi-level timing simulation on GPUs
- Eric Schneider
  University of Stuttgart, Pfaffenwaldring 47, 70569 Stuttgart, Germany
  ,
- Michael A. Kochte
  University of Stuttgart, Pfaffenwaldring 47, 70569 Stuttgart, Germany
  ,
- Hans-Joachim Wunderlich
  University of Stuttgart, Pfaffenwaldring 47, 70569 Stuttgart, Germany
2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)•January 2018, pp 470-475• https://doi.org/10.1109/ASPDAC.2018.8297368
Timing-accurate simulation of circuits is an important task in design validation of modern nano-scale CMOS circuits. With shrinking technology nodes, detailed simulation models down to transistor level have to be considered. While conventional simulation ...
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research-article
Aging Resilience and Fault Tolerance in Runtime Reconfigurable Architectures
- Hongyan Zhang
  Chair for Embedded Systems, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany
  ,
- Lars Bauer
  Chair for Embedded Systems, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany
  ,
- Michael Andreas Kochte
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
  ,
- Eric Schneider
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
  ,
- Hans-Joachim Wunderlich
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
  ,
- Jorg Henkel
  Chair for Embedded Systems, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany
IEEE Transactions on Computers, Volume 66, Issue 6•June 2017, pp 957-970 • https://doi.org/10.1109/TC.2016.2616405

Runtime reconfigurable architectures based on Field-Programmable Gate Arrays (FPGAs) allow area- and power-efficient acceleration of complex applications. However, being manufactured in latest semiconductor process technologies, FPGAs are increasingly ...
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research-article
GPU-Accelerated Simulation of Small Delay Faults
- Eric Schneider
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
  ,
- Michael A. Kochte
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
  ,
- Stefan Holst
  Department of Creative Informatics, Kyushu Institute of Technology, Iizuka, Japan
  ,
- Xiaoqing Wen
  Department of Creative Informatics, Kyushu Institute of Technology, Iizuka, Japan
  ,
- Hans-Joachim Wunderlich
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Stuttgart, Germany
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 36, Issue 5•May 2017, pp 829-841 • https://doi.org/10.1109/TCAD.2016.2598560

Delay fault simulation is an essential task during test pattern generation and reliability assessment of electronic circuits. With the high sensitivity of current nano-scale designs toward even smallest delay deviations, the simulation of small gate ...
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research-article
Mixed 01X-RSL-Encoding for fast and accurate ATPG with unknowns
- Dominik Erb
  University of Freiburg, Georges-Köhler-Allee 51, 79110, Germany
  ,
- Karsten Scheibler
  University of Freiburg, Georges-Köhler-Allee 51, 79110, Germany
  ,
- Michael A. Kochte
  University of Stuttgart, Pfaffenwaldring 47, 70569, Germany
  ,
- Matthias Sauer
  University of Freiburg, Georges-Köhler-Allee 51, 79110, Germany
  ,
- Hans-Joachim Wunderlich
  University of Stuttgart, Pfaffenwaldring 47, 70569, Germany
  ,
- Bernd Becker
  University of Freiburg, Georges-Köhler-Allee 51, 79110, Germany
2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), pp 749-754• https://doi.org/10.1109/ASPDAC.2016.7428101
Unknown (X) values in a design introduce pessimism in conventional test generation algorithms, which results in a loss of fault coverage. This pessimism is reduced by a more accurate modeling and analysis. Unfortunately, accurate analysis techniques ...
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Accurate QBF-Based Test Pattern Generation in Presence of Unknown Values
- Dominik Erb
  Univ. of Freiburg, Freiburg, Germany
  ,
- Michael A. Kochte
  Inst. of Comput. Archit. & Comput. Eng., Univ. of Stuttgart, Stuttgart, Germany
  ,
- Sven Reimer
  Univ. of Freiburg, Freiburg, Germany
  ,
- Matthias Sauer
  Univ. of Freiburg, Freiburg, Germany
  ,
- Hans-Joachim Wunderlich
  Inst. of Comput. Archit. & Comput. Eng., Univ. of Stuttgart, Stuttgart, Germany
  ,
- Bernd Becker
  Univ. of Freiburg, Freiburg, Germany
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 34, Issue 12•Dec. 2015, pp 2025-2038 • https://doi.org/10.1109/TCAD.2015.2440315
Unknown (X) values emerge during the design process as well as during system operation and test application. X-sources are for instance black boxes in design models, clock-domain boundaries, analog-to-digital converters, or uncontrolled or uninitialized ...
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Article
Intermittent and Transient Fault Diagnosis on Sparse Code Signatures
ATS '15: Proceedings of the 2015 IEEE 24th Asian Test Symposium (ATS)•November 2015, pp 157-162• https://doi.org/10.1109/ATS.2015.34

Failure diagnosis of field returns typically requires high quality test stimuli and assumes that tests can be repeated. For intermittent faults with fault activation conditions depending on the physical environment, the repetition of tests cannot ensure ...
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Optimized Selection of Frequencies for Faster-Than-at-Speed Test
ATS '15: Proceedings of the 2015 IEEE 24th Asian Test Symposium (ATS)•November 2015, pp 109-114• https://doi.org/10.1109/ATS.2015.26

Small gate delay faults (SDFs) are not detectable at-speed, if they can only be propagated along short paths. These hidden delay faults (HDFs) do not influence the circuit's behavior initially, but they may indicate design marginalities leading to early-...
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Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch
- K. Asada,
- X. Wen,
- S. Holst,
- K. Miyase,
- S. Kajihara,
- M. A. Kochte,
- E. Schneider,
- H.-J. Wunderlich,
- J. Qian
ATS '15: Proceedings of the 2015 IEEE 24th Asian Test Symposium (ATS)•November 2015, pp 103-108• https://doi.org/10.1109/ATS.2015.25

IR-drop induced by launch switching activity (LSA) in capture mode during at-speed scan testing increases delay along not only logic paths (LPs) but also clock paths (Cps). Excessive extra delay along LPs compromises test yields due to false capture ...
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tutorial
STRAP: Stress-Aware Placement for Aging Mitigation in Runtime Reconfigurable Architectures
- Hongyan Zhang
  Chair for Embedded Systems, Karlsruhe Institute of Technology, Karlsruhe, Germany
  ,
- Michael A. Kochte
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Germany
  ,
- Eric Schneider
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Germany
  ,
- Lars Bauer
  Chair for Embedded Systems, Karlsruhe Institute of Technology, Karlsruhe, Germany
  ,
- Hans-Joachim Wunderlich
  Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Germany
  ,
- Jörg Henkel
  Chair for Embedded Systems, Karlsruhe Institute of Technology, Karlsruhe, Germany
ICCAD '15: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design•November 2015, pp 38-45

Aging effects in nano-scale CMOS circuits impair the reliability and Mean Time to Failure (MTTF) of embedded systems. Especially for FPGAs that are manufactured in the latest technology node, aging is a major concern.

We introduce the first cross-layer ...
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Average citations per article = The total Citation Count divided by the total Publication Count.
Citation Count = cumulative total number of times all authored works by this author were cited by other works within ACM's bibliographic database. Almost all reference lists in articles published by ACM have been captured. References lists from other publishers are less well-represented in the database. Unresolved references are not included in the Citation Count. The Citation Count is citations TO any type of work, but the references counted are only FROM journal and proceedings articles. Reference lists from books, dissertations, and technical reports have not generally been captured in the database. (Citation Counts for individual works are displayed with the individual record listed on the Author Page.)
Publication Count = all works of any genre within the universe of ACM's bibliographic database of computing literature of which this person was an author. Works where the person has role as editor, advisor, chair, etc. are listed on the page but are not part of the Publication Count.
Publication Years = the span from the earliest year of publication on a work by this author to the most recent year of publication of a work by this author captured within the ACM bibliographic database of computing literature (The ACM Guide to Computing Literature, also known as "the Guide".
Available for download = the total number of works by this author whose full texts may be downloaded from an ACM full-text article server. Downloads from external full-text sources linked to from within the ACM bibliographic space are not counted as 'available for download'.
Average downloads per article = The total number of cumulative downloads divided by the number of articles (including multimedia objects) available for download from ACM's servers.
Downloads (cumulative) = The cumulative number of times all works by this author have been downloaded from an ACM full-text article server since the downloads were first counted in May 2003. The counts displayed are updated monthly and are therefore 0-31 days behind the current date. Robotic activity is scrubbed from the download statistics.
Downloads (12 months) = The cumulative number of times all works by this author have been downloaded from an ACM full-text article server over the last 12-month period for which statistics are available. The counts displayed are usually 1-2 weeks behind the current date. (12-month download counts for individual works are displayed with the individual record.)
Downloads (6 weeks) = The cumulative number of times all works by this author have been downloaded from an ACM full-text article server over the last 6-week period for which statistics are available. The counts displayed are usually 1-2 weeks behind the current date. (6-week download counts for individual works are displayed with the individual record.)

ACM Author-Izer Service

Summary Description

ACM Author-Izer is a unique service that enables ACM authors to generate and post links on both their homepage and institutional repository for visitors to download the definitive version of their articles from the ACM Digital Library at no charge.

Downloads from these sites are captured in official ACM statistics, improving the accuracy of usage and impact measurements. Consistently linking to definitive version of ACM articles should reduce user confusion over article versioning.

ACM Author-Izer also extends ACM’s reputation as an innovative “Green Path” publisher, making ACM one of the first publishers of scholarly works to offer this model to its authors.

To access ACM Author-Izer, authors need to establish a free ACM web account. Should authors change institutions or sites, they can utilize the new ACM service to disable old links and re-authorize new links for free downloads from a different site.

How ACM Author-Izer Works

Authors may post ACM Author-Izer links in their own bibliographies maintained on their website and their own institution’s repository. The links take visitors to your page directly to the definitive version of individual articles inside the ACM Digital Library to download these articles for free.

The Service can be applied to all the articles you have ever published with ACM.

Depending on your previous activities within the ACM DL, you may need to take up to three steps to use ACM Author-Izer.

For authors who do not have a free ACM Web Account:

Go to the ACM DL http://dl.acm.org/ and click SIGN UP. Once your account is established, proceed to next step.

For authors who have an ACM web account, but have not edited their ACM Author Profile page:

Sign in to your ACM web account and go to your Author Profile page. Click "Add personal information" and add photograph, homepage address, etc. Click ADD AUTHOR INFORMATION to submit change. Once you receive email notification that your changes were accepted, you may utilize ACM Author-izer.

For authors who have an account and have already edited their Profile Page:

Sign in to your ACM web account, go to your Author Profile page in the Digital Library, look for the ACM Author-izer link below each ACM published article, and begin the authorization process. If you have published many ACM articles, you may find a batch Authorization process useful. It is labeled: "Export as: ACM Author-Izer Service"

ACM Author-Izer also provides code snippets for authors to display download and citation statistics for each “authorized” article on their personal pages. Downloads from these pages are captured in official ACM statistics, improving the accuracy of usage and impact measurements. Consistently linking to the definitive version of ACM articles should reduce user confusion over article versioning.

Note: You still retain the right to post your author-prepared preprint versions on your home pages and in your institutional repositories with DOI pointers to the definitive version permanently maintained in the ACM Digital Library. But any download of your preprint versions will not be counted in ACM usage statistics. If you use these AUTHOR-IZER links instead, usage by visitors to your page will be recorded in the ACM Digital Library and displayed on your page.

FAQ

Q. What is ACM Author-Izer?
A. ACM Author-Izer is a unique, link-based, self-archiving service that enables ACM authors to generate and post links on either their home page or institutional repository for visitors to download the definitive version of their articles for free.
Q. What articles are eligible for ACM Author-Izer?
A. ACM Author-Izer can be applied to all the articles authors have ever published with ACM. It is also available to authors who will have articles published in ACM publications in the future.

Q. Are there any restrictions on authors to use this service?
A. No. An author does not need to subscribe to the ACM Digital Library nor even be a member of ACM.

Q. What are the requirements to use this service?
A. To access ACM Author-Izer, authors need to have a free ACM web account, must have an ACM Author Profile page in the Digital Library, and must take ownership of their Author Profile page.

Q. What is an ACM Author Profile Page?
A. The Author Profile Page initially collects all the professional information known about authors from the publications record as known by the ACM Digital Library. The Author Profile Page supplies a quick snapshot of an author's contribution to the field and some rudimentary measures of influence upon it. Over time, the contents of the Author Profile page may expand at the direction of the community. Please visit the ACM Author Profile documentation page for more background information on these pages.

Q. How do I find my Author Profile page and take ownership?
A. You will need to take the following steps:
- Create a free ACM Web Account
- Sign-In to the ACM Digital Library
- Find your Author Profile Page by searching the ACM Digital Library for your name
- Find the result you authored (where your author name is a clickable link)
- Click on your name to go to the Author Profile Page
- Click the "Add Personal Information" link on the Author Profile Page
- Wait for ACM review and approval; generally less than 24 hours

Q. Why does my photo not appear?
A. Make sure that the image you submit is in .jpg or .gif format and that the file name does not contain special characters

Q. What if I cannot find the Add Personal Information function on my author page?
A. The ACM account linked to your profile page is different than the one you are logged into. Please logout and login to the account associated with your Author Profile Page.

Q. What happens if an author changes the location of his bibliography or moves to a new institution?
A. Should authors change institutions or sites, they can utilize ACM Author-Izer to disable old links and re-authorize new links for free downloads from a new location.

Q. What happens if an author provides a URL that redirects to the author’s personal bibliography page?
A. The service will not provide a free download from the ACM Digital Library. Instead the person who uses that link will simply go to the Citation Page for that article in the ACM Digital Library where the article may be accessed under the usual subscription rules.

However, if the author provides the target page URL, any link that redirects to that target page will enable a free download from the Service.

Q. What happens if the author’s bibliography lives on a page with several aliases?
A. Only one alias will work, whichever one is registered as the page containing the author’s bibliography. ACM has no technical solution to this problem at this time.

Q. Why should authors use ACM Author-Izer?
A. ACM Author-Izer lets visitors to authors’ personal home pages download articles for no charge from the ACM Digital Library. It allows authors to dynamically display real-time download and citation statistics for each “authorized” article on their personal site.

Q. Does ACM Author-Izer provide benefits for authors?
A. Downloads of definitive articles via Author-Izer links on the authors’ personal web page are captured in official ACM statistics to more accurately reflect usage and impact measurements.

Authors who do not use ACM Author-Izer links will not have downloads from their local, personal bibliographies counted. They do, however, retain the existing right to post author-prepared preprint versions on their home pages or institutional repositories with DOI pointers to the definitive version permanently maintained in the ACM Digital Library.

Q. How does ACM Author-Izer benefit the computing community?
A. ACM Author-Izer expands the visibility and dissemination of the definitive version of ACM articles. It is based on ACM’s strong belief that the computing community should have the widest possible access to the definitive versions of scholarly literature. By linking authors’ personal bibliography with the ACM Digital Library, user confusion over article versioning should be reduced over time.

In making ACM Author-Izer a free service to both authors and visitors to their websites, ACM is emphasizing its continuing commitment to the interests of its authors and to the computing community in ways that are consistent with its existing subscription-based access model.

Q. How do authors access ACM Author-Izer?
A. See How to Use

Q. Why can’t I find my most recent publication in my ACM Author Profile Page?
A. There is a time delay between publication and the process which associates that publication with an Author Profile Page. Right now, that process usually takes 4-8 weeks.

Q. How does ACM Author-Izer expand ACM’s “Green Path” Access Policies?
A. ACM Author-Izer extends the rights and permissions that authors retain even after copyright transfer to ACM, which has been among the “greenest” publishers. ACM enables its author community to retain a wide range of rights related to copyright and reuse of materials. They include:
- Posting rights that ensure free access to their work outside the ACM Digital Library and print publications
- Rights to reuse any portion of their work in new works that they may create
- Copyright to artistic images in ACM’s graphics-oriented publications that authors may want to exploit in commercial contexts
- All patent rights, which remain with the original owner