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As the primary second-order effect, parasitic issues have to be seriously addressed when synthesizing high-performance analog and RF integrated circuits (ICs). In this article, a two-phase hybrid sizing methodology for analog and RF ICs is proposed to ...

We introduce the paradigm of chaotic mathematical circuitry which shows some similarity to the paradigm of electronic circuitry, especially in the frame of chaotic attractors for solving practical problems (generating hyperchaos; developing chaos based ...

A fast technique for proving steady-state analog circuit operation constraints is described. Based on SAT, the technique is applicable to practical circuit design and modeling scenarios as it does not require algebraic device models. Despite the ...

In this paper, a circuit model is done for rectangular printed disc monopole antenna with slot for ultra wideband application. For this circuit modeling, patch cavity model consists of series resistor and inductor which represent the surface resistance ...

This paper introduces CACTI-P, the first architecture-level integrated power, area, and timing modeling framework for SRAM-based structures with advanced leakage power reduction techniques. CACTI-P supports modeling of major leakage power reduction ...

This paper presents a circuit modeling procedure for Ultra-wideband (UWB) Tx-Rx antenna systems based on frequency domain S-parameters. The modeling used an existing two-port network's model consisting of four SPICE analog behavioral modules. The ...

In this article a cascaded defected microstrip structures (CDMS) is proposed as the feed line of an inset patch microstrip antenna. Using this feed line, the effective radiation is improved; the higher order harmonics are completely suppressed, the size ...

Clock meshes possess inherent low clock skews and excellent immunity to process-voltage-temperature variations, and have increasingly found their way to high-performance integrated circuit designs. However, analysis of such massively coupled networks is ...

Power gating is one of the most effective ways to reduce leakage power. In this paper, we introduce a new relationship among maximum instantaneous current, IR-drops and sleep transistor networks from a temporal viewpoint. Based on this relationship, we ...

Single-electron devices have been widely used in electronics and physics research, and are believed to be one of the potential alternatives to CMOS circuits due to their small size and ultra-low power dissipation. In the recent past, three simulation ...

In this article, two cascaded defected microstrip structures (CDMSs) are proposed to increase the effective inductance. So the cutoff frequencies of filters made by CDMSs can be controlled. The proposed CDMSs have wider stopband characteristic and ...

The modeling of track circuit (TC) signaling systems is considered to be a valuable tool for their validation (check of operation for exceptional and extreme network conditions and configurations), compatibility assessment (with respect to sources of ...

Measurement-based frequency-dependent circuit models for carbon nanotube networks are developed. The procedure of extraction include: fabricating planar transmission-line structures for microwave test where CNT networks replace the metallic traces; ...

The conventional sleep transistor sizing schemes do not consider the resonant supply noise which represents the worst-case supply disturbance. This paper investigates the impact of sleep transistor sizing on different on-chip noise components and shows ...

It is commonly accepted that the most accurate analysis methods of lumped circuits are based on time-domain algorithms. If the circuit behavior is quasiperiodic, as in the case of several electronic equipment (e.g. communications, medicine or audio-...

Control of on-chip power supply noise has become a major challenge for continuous scaling of CMOS technology. Conventional passive decoupling capacitors (decaps) exhibit significant area and leakage penalties. To improve the efficiency of power supply ...

Leakage power is becoming the dominant component of chip power consumption with continued CMOS scaling. An important but commonly unnoticed fact is that leaky transistors act as resistors that help dampen the mid-frequency power supply noise. This paper ...

A method for the computation of nonlinear digital filter networks containing delay-free loops is proposed. By preserving the topology of the network this method permits the inspection of all signals flowing across the loops. Furthermore, it enables to ...

Single-electron devices have drawn much attention in the last two decades. They have been widely used for device research and also show promise as a potential alternative to CMOS circuits due to their ultralow power dissipation. Three techniques have ...

This paper presents a statistical leakage estimation method for FinFET devices considering the unique width quantization property. Monte Carlo simulations show that the conventional approach underestimates the average leakage current of FinFET devices ...