short-paper

Design of novel CAM core cell structures for an efficient implementation of low power BCAM system

Authors:

Palanichamy Manikandan,

Bjørn B. Larsen,

Einar J. AasAuthors Info & Claims

GLSVLSI '09: Proceedings of the 19th ACM Great Lakes symposium on VLSI

Pages 57 - 62

https://doi.org/10.1145/1531542.1531559

Published: 10 May 2009 Publication History

Abstract

This paper presents novel cell structures for fully parallel static type binary content addressable memory (BCAM) with low power and high flexibility. The proposed CAM core cell structures eliminate the drawbacks and adapt the advantages of single bit line and dual bit line cell structures. In this work, the word match line (ML) structure of low power BCAM employs Static pseudo CMOS (SPC) logic. HSPICE simulations for 32×32 and 128×32 BCAM systems were performed under 0.18 mm technology for different cell structures. The result shows that the proposed design provides the power dissipation of 3.94 mW with the delay time of 2.02 ns @ 1.8 V supply voltage. The measurement results of 128×32 PC-BCAM show that the proposed BCAM cell reduces power dissipation by 76% and improves search speed by 65%

References

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Cited By

Lin LJian CXiaoying S(2010)A New Gaussian Mixture Model Optimization MethodProceedings of the 2010 International Conference on Electrical and Control Engineering10.1109/iCECE.2010.42(137-140)Online publication date: 25-Jun-2010
https://dl.acm.org/doi/10.1109/iCECE.2010.42
Manikandan PLarsen BAas EReddy S(2010)Test of Embedded Content Addressable MemoriesProceedings of the 2010 International Symposium on Electronic System Design10.1109/ISED.2010.30(113-118)Online publication date: 20-Dec-2010
https://dl.acm.org/doi/10.1109/ISED.2010.30
Manikandan PLarsen BAas E(2010)Path-Delay Fault Testing in Embedded Content Addressable MemoriesProceedings of the 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools10.1109/DSD.2010.48(519-524)Online publication date: 1-Sep-2010
https://dl.acm.org/doi/10.1109/DSD.2010.48

Index Terms

Design of novel CAM core cell structures for an efficient implementation of low power BCAM system
1. Hardware
  1. Hardware test
    1. Test-pattern generation and fault simulation
  2. Hardware validation
    1. Functional verification

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Published In

cover image ACM Conferences

GLSVLSI '09: Proceedings of the 19th ACM Great Lakes symposium on VLSI

May 2009

558 pages

ISBN:9781605585222

DOI:10.1145/1531542

Co-chair:
Fabrizio Lombardi,
General Chairs:
Sanjukta Bhanja
University of South Florida, USA
,
Yehia Massoud
Rice University, USA
,
Program Chair:
R. Iris Bahar
Brown University, USA

Copyright © 2009 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 10 May 2009

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GLSVLSI '09

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GLSVLSI '09: Great Lakes Symposium on VLSI 2009

May 10 - 12, 2009

MA, Boston Area, USA

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Cited By

Lin LJian CXiaoying S(2010)A New Gaussian Mixture Model Optimization MethodProceedings of the 2010 International Conference on Electrical and Control Engineering10.1109/iCECE.2010.42(137-140)Online publication date: 25-Jun-2010
https://dl.acm.org/doi/10.1109/iCECE.2010.42
Manikandan PLarsen BAas EReddy S(2010)Test of Embedded Content Addressable MemoriesProceedings of the 2010 International Symposium on Electronic System Design10.1109/ISED.2010.30(113-118)Online publication date: 20-Dec-2010
https://dl.acm.org/doi/10.1109/ISED.2010.30
Manikandan PLarsen BAas E(2010)Path-Delay Fault Testing in Embedded Content Addressable MemoriesProceedings of the 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools10.1109/DSD.2010.48(519-524)Online publication date: 1-Sep-2010
https://dl.acm.org/doi/10.1109/DSD.2010.48

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