research-article

2μs row time 12-bit column-parallel single slope ADC for high-speed CMOS image sensor

Authors:

Kaiming NieAuthors Info & Claims

Volume 135, Issue C

https://doi.org/10.1016/j.mejo.2023.105768

Published: 01 May 2023 Publication History

Abstract

To improve the conversion speed of single-slope (SS) analog-to-digital converter (ADC) for high frame rate CMOS image sensor, a cycle time-to-digital converter (TDC)-based readout technique is proposed, which optimizes the quantization method. And the proposed SS ADC prioritizes the quantization of the most significant bit (MSB), aiming to shorten the search range of the slope and greatly improve the quantization speed while ensuring accuracy. Furthermore, the proposed scheme is reversible to operate the conventional SS ADC algorithm, thus it preserves the structural advantages of the SS ADC. The proposed SS ADC is designed and simulated with 0.11-μm process. The simulation results show that the row time of SS ADC is 2 μs and the resolution is 500 ps, which greatly improves the quantization speed while ensuring power consumption and accuracy. The FoM is 182.6 fJ/step, which is a 7.1% improvement compared to other TDC-based SS ADCs. The proposed SS ADC becomes more effective as the bit-depth of the ADC increases.

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Cited By

Liu XCao TLi HYuan XXu WLi T(2024)A 180 fps WVGA CIS with 3.2e− TRN and dual-readout modesMicroelectronics Journal10.1016/j.mejo.2024.106196148:COnline publication date: 1-Jun-2024
https://dl.acm.org/doi/10.1016/j.mejo.2024.106196
Wang QYe MLi YZheng XZhao Y(2023)A high area-and-energy efficiency 12-bit column-parallel SAR/SS ADC for high-speed infrared focal plane readout circuits with error correctionMicroelectronics Journal10.1016/j.mejo.2023.105918140:COnline publication date: 1-Oct-2023
https://dl.acm.org/doi/10.1016/j.mejo.2023.105918

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Published In

cover image Microelectronics Journal

Microelectronics Journal Volume 135, Issue C

May 2023

201 pages

ISSN:0026-2692

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Elsevier Ltd.

Publisher

Elsevier Science Publishers B. V.

Netherlands

Publication History

Published: 01 May 2023

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Cited By

Liu XCao TLi HYuan XXu WLi T(2024)A 180 fps WVGA CIS with 3.2e− TRN and dual-readout modesMicroelectronics Journal10.1016/j.mejo.2024.106196148:COnline publication date: 1-Jun-2024
https://dl.acm.org/doi/10.1016/j.mejo.2024.106196
Wang QYe MLi YZheng XZhao Y(2023)A high area-and-energy efficiency 12-bit column-parallel SAR/SS ADC for high-speed infrared focal plane readout circuits with error correctionMicroelectronics Journal10.1016/j.mejo.2023.105918140:COnline publication date: 1-Oct-2023
https://dl.acm.org/doi/10.1016/j.mejo.2023.105918

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