Performance analysis of InAs- and GaSb-InAs-based independent gate tunnel field effect transistor RF mixers
Authors: 
M. Pown, B. LakshmiAuthors Info & Claims
Pages 676 - 684
Abstract
This study compares the performance of radio frequency (RF) mixers employing independent-gate tunnel field-effect transistors (IG TFETs) based on homo (InAs) and heterojunctions (GaSb-InAs). A RF mixer circuit using double gate TFET of 20 nm is designed with the optimal biases on the two gates. IG TFETs used in the circuit simulation are developed with the help of a look-up table based Verilog-A code. The down conversion of RF mixers are operated at a frequency of 95 GHz. The figures-of-merit (FOM), conversion gain $$(G_{\mathrm {C}})$$(GC), noise figure (NF) and the average power consumption of the mixer circuits are studied along with the different device parameter variations, gate length $$(L_{\mathrm {g}})$$(Lg), gate oxide thickness $$(T_{\mathrm {ox}})$$(Tox) and channel thickness $$(T_{\mathrm {ch}})$$(Tch). Higher $$G_{\mathrm {C}}$$GC and lower NF are achieved for heterojunction-based TFET mixers with respect to their parameter variations. An average power consumption of 168 and $$227.5\,{\upmu }\hbox {W}$$227.5μW is obtained for homo- and heterojunction-based TFET mixers, respectively.
References
[1]
Laha, S., Kaya, S.: Bias optimization of 2.4 GHz double gate MOSFET RF mixer. Analog Integr. Circuits Signal Process. 77, 529---537 (2013)
[2]
Wang, H., Hsu, A., Wu, J., Kong, J., Palacios, T.: Graphene-based ambipolar RF mixers. IEEE Electron Device Lett. 31, 906---908 (2010)
[3]
Maas, S.A.: A GaAs MESFET mixer with very low intermodulation. IEEE Trans. Microw. Theory Tech. MTT 35, 425---429 (1987)
[4]
Shaharuddin, N.A., Idrus, S.M., Isaak, S., Mohamed, N.A., Yusni, N.A.A.: Large signal model of heterojunction bipolar transistor InP/InGaAs as an optoelectronic mixer. J. Teknol. 3, 33---36 (2014)
[5]
Weimin, Z., Fossum, J.G., Mathew, L., Yang, D.: Physical insights regarding design and performance of independent-gate FinFETs. IEEE Trans. Electron Devices 52, 2198---2205 (2005)
[6]
Vanetha, E.P., Lakshmi, B., Srinivasan, R.: Double gate junctionless FET based RF mixer--a comparative study with conventional double gate FET based RF mixer. In: International Conference on Computing, Electronics and Electrical Technologies (ICCEET), pp. 757---760 (2012)
[7]
Madan, H., Hollander, M.J., Cavalero, R., Snyder, D., Robinson, J.A., Datta, S.: Record high conversion gain ambipolar graphene mixer at a 10 GHz using scaled gate oxide. In: IEEE International Electron Devices Meeting (IEDM), pp. 76---79 (2012)
[8]
Kushwah, R.S., Akashe, S.: FinFET based tunable analog circuit: Design and analysis at 45 nm technology. Chin. J. Eng. 2013, 1---8 (2013)
[9]
Mathew, L., Du, Y., Kalpat, S., Sadd, M., Zavala, M., Stephens, T., Mora, R., Rai, R., Becker, S., Parker, C., Sing, D., Shimer, R., Sanez, J., Thean, A.V.Y., Prabhu, L., Moosa, M., Nguyen, B.Y., Mogab, J., Workman, G.O., Vandooren, A., Shi, Z., Chowdhury, M.M., Zhang, W., Fossum, J.G.: Multiple independent gate field effect transistor (MIGFET)--multi-fin RF mixer architecture, three independent gates (MIGFET-T) operation and temperature characteristics. In: Digest of Technical Papers--Symposium on VLSI Technology, pp. 200---201 (2005)
[10]
Lu, H., Seabaugh, A.: Tunnel field-effect transistors: State-of-the-art. IEEE J. Electron Devices Soc. 2, 44---49 (2014)
[11]
Datta, S., Liu, H., Narayanan, V.: Tunnel FET technology: A reliability perspective. Microelectron. Reliab. 54, 861---874 (2014)
[12]
Saripalli, V., Datta, S., Narayanan, V., Kulkarni, J.P.: Variation-tolerant ultra low-power heterojunction tunnel FET SRAM design. In: IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), pp. 45---52 (2011)
[13]
Liu, H., Li, X., Vaddi, R., Datta, S., Narayanan, V.: Tunnel FET RF rectifier design for energy harvesting applications. IEEE J. Emerg. Sel. Top. Circuits Syst. 4, 400---411 (2014)
[14]
Narang, R., Saxena, M., Gupta, R.S., Gupta, M.: Assessment of ambipolar behavior of a tunnel FET and influence of structural modifications. J. Semicond. Technol. Sci. 12, 482---491 (2012)
[15]
Graef, M., Holtij, T., Hain, F., Kloes, A., Iñíguez, B.: A 2D closed form model for the electrostatics in hetero-junction double-gate tunnel-FETs for calculation of band-to-band tunneling current. Microelectron. J. 45, 1144---1153 (2014)
[16]
Toh, E.H., Wang, G.H., Chan, L., Sylvester, D., Heng, C.H., Samudra, G.S., Yeo, Y.C.: Device design and scalability of a double-gate tunneling field-effect transistor with silicon--germanium source. Jpn. J. Appl. Phys. 47, 2593---2597 (2008)
[17]
Madan, H., Saripalli, V., Liu, H., Datta, S.: Asymmetric tunnel field-effect transistors as frequency multipliers. IEEE Electron. Device Lett. 33, 1547---1549 (2012)
[18]
Synopsys Sentaurus Device User Guide 2015 version K-2015.06-SP2
[19]
Liu, H., Saripalli, V., Narayanan, V., Datta, S.: http://nanohub.org/resources/21015/download/PennState__III-V__TFET_VerilogAModel_1.0.0_Manual.pdf
[20]
Ford, A.C., Yeung, C.W., Chuang, S., Kim, H.S., Plis, E., Krishna, S., Hu, C., Javey, A.: Ultrathin body InAs tunneling field-effect transistors on Si substrates. Appl. Phys. Lett. 98, 98---100 (2011)
[21]
Mookerjea, S., Datta, S.: Comparative study of Si, Ge and InAs based steep subthreshold slope tunnel transistors for 0.25 V supply voltage logic applications. In: Device Research Conference--Conf. Dig. DRC, vol. 567, pp. 47---48 (2008)
[22]
Gehring, A., Selberherr, S.: Tunneling models for semiconductor device simulation. In: Rieth, M., Schommers, W. (eds.) Handbook of Theoretical and Computational Nanotechnology. Nanodevice modeling and nanoelectronics, vol. 10, pp. 469---543. American Scientific Publishers (2006)
[23]
Zhou, G., Li, R., Vasen, T., Qi, M., Chae, S., Lu, Y., Zhang, Q., Zhu, H., Kuo, J.M., Kosel, T., Wistey, M., Fay, P., Seabaugh, A., Xing, H.: Novel gate-recessed vertical InAs/GaSb TFETs with record high I$$_{{\rm ON}}$$ON of $$180\,{\upmu }\text{A}/{\upmu }\text{ m }$$180μA/μm at V$$_{{\rm DS}}$$DS = 0.5 V. In: Technical Digest--International Electron Devices Meeting, IEDM, pp. 777---780 (2012)
[24]
Zarei, M.Y., Asadpour, R., Mohammadi, S., Afzali-Kusha, A., Seyyedi, R.: Modeling symmetrical independent gate FinFET using predictive technology model. In: Proceedings of 23rd ACM International Conference on Great Lakes Symposium VLSI, pp. 299---304 (2013)
[25]
Lee, T.: The design of CMOS radio-frequency integrated circuits. Cambridge University Press, Cambridge (1998)
[26]
Vijayvargiya, V., Kumar Vishvakarma, S.: Effect of drain doping profile on double-gate tunnel field-effect transistor and its influence on device RF performance. IEEE Trans. Nanotechnol. 13, 974---981 (2014)
[27]
Dash, S., Mishra, G.P.: A 2D analytical cylindrical gate tunnel FET (CG-TFET) model: impact of shortest tunneling distance. Adv. Nat. Sci. Nanosci. Nanotechnol. 6, 1---10 (2015)
[28]
Power measurement with Cadence EDA: www.wiki.usgroup.eu/wiki/public/tutorials/powermeasure
[29]
Alvarado, U., Bistue, G., Adin, I.: Low power RF circuit design in standard CMOS technology. Springer, Berlin (2011)
- Performance analysis of InAs- and GaSb-InAs-based independent gate tunnel field effect transistor RF mixers
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Published: 01 September 2017
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