Toward Software-like Debugging for FPGAs via Checkpointing and Transaction-based Co-Simulation
Authors: 
Sameh Attia, Vaughn BetzAuthors Info & Claims
Article No.: 31, Pages 1 - 24
Abstract
Checkpoint-based debugging flows have recently been developed that allow the user to move the design state back and forth between an FPGA and a simulator. They provide a softwarelike debugging experience by combining the speed of hardware execution and the full visibility of simulation. However, they assume the entire system state can be moved to a simulator, limiting them to self-contained systems. In this article, we present StateLink, a transaction-based co-simulation framework that allows part of the system (the task) to run in a simulator and still interact with other system components that reside in hardware. StateLink allows tasks to remain connected to and active in the overall hardware system after their state is moved to a simulator. This extends the functionality of checkpoint-based debugging frameworks to designs with external I/Os and significantly speeds up the simulation of tasks that are part of a large system. StateLink typically adds no timing overhead and a modest hardware area overhead. The total area overhead of using the proposed flow on a Memcached system is only 13%. This flow allows the user to benefit from both the hardware speedup of ∼1M× and the StateLink speedup of up to 44× versus full system simulation.
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Index Terms
- Toward Software-like Debugging for FPGAs via Checkpointing and Transaction-based Co-Simulation
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June 2023
451 pages
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Publication History
Published: 10 May 2023
Online AM: 01 August 2022
Accepted: 25 July 2022
Revised: 22 June 2022
Received: 06 April 2022
Published in TRETS Volume 16, Issue 2
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- NSERC/Intel Industrial Research Chair in Programmable Silicon, a Connaught Scholarship
- Canadian Foundation for Innovation
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