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An Approach to Unlocking Cyclic Logic Locking: LOOPLock 2.0

Published: 22 December 2022 Publication History

Abstract

Cyclic logic locking is a new type of SAT-resistant techniques in hardware security. Recently, LOOPLock 2.0 was proposed, which is a cyclic logic locking method creating cycles deliberately in the locked circuit to resist SAT Attack, CycSAT, BeSAT, and Removal Attack simultaneously. The key idea of LOOPLock 2.0 is that the resultant circuit is still cyclic no matter the key vector is correct or not. This property refuses attackers and demonstrates its success on defending against attackers. In this paper, we propose an unlocking approach to LOOPLock 2.0 based on structure analysis and SAT solvers. Specifically, we identify and remove non-combinational cycles in the locked circuit before running SAT solvers. The experimental results show that the proposed unlocking approach is promising.

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Cited By

View all
  • (2024)FCLock: harnessing functional non-combinational cycles in logic lockingIEICE Electronics Express10.1587/elex.21.2024021821:12(20240218-20240218)Online publication date: 25-Jun-2024
  • (2024)LOOPLock 3.0: A Robust Cyclic Logic Locking ApproachProceedings of the 29th Asia and South Pacific Design Automation Conference10.1109/ASP-DAC58780.2024.10473877(594-599)Online publication date: 22-Jan-2024
  • (2023)Dynamic Digital Circuit Locking (DDCL): A Shield against Static Analysis Attacks2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC)10.1109/VLSI-SoC57769.2023.10321882(1-6)Online publication date: 16-Oct-2023

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      cover image ACM Conferences
      ICCAD '22: Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design
      October 2022
      1467 pages
      ISBN:9781450392174
      DOI:10.1145/3508352
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      • IEEE-EDS: Electronic Devices Society
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      Publication History

      Published: 22 December 2022

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      Author Tags

      1. BeSAT
      2. CycSAT
      3. LOOPLock 2.0
      4. SAT attack
      5. hardware security
      6. logic unlocking

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      ICCAD '22
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      ICCAD '22: IEEE/ACM International Conference on Computer-Aided Design
      October 30 - November 3, 2022
      California, San Diego

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      Cited By

      View all
      • (2024)FCLock: harnessing functional non-combinational cycles in logic lockingIEICE Electronics Express10.1587/elex.21.2024021821:12(20240218-20240218)Online publication date: 25-Jun-2024
      • (2024)LOOPLock 3.0: A Robust Cyclic Logic Locking ApproachProceedings of the 29th Asia and South Pacific Design Automation Conference10.1109/ASP-DAC58780.2024.10473877(594-599)Online publication date: 22-Jan-2024
      • (2023)Dynamic Digital Circuit Locking (DDCL): A Shield against Static Analysis Attacks2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC)10.1109/VLSI-SoC57769.2023.10321882(1-6)Online publication date: 16-Oct-2023

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