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JOM: A Joint Operation Mechanism for NAND Flash Memory

Published: 02 August 2016 Publication History

Abstract

In the storage systems of NAND flash memory, an intermediate software called a Flash Translation Layer (FTL) is adopted to hide the characteristics of NAND flash memory and provide efficient management for NAND flash memory. Current flash translation layers can be classified into a page-mapping FTL, a block-mapping FTL, and a hybrid-mapping FTL. In order to utilize the advantages of the page-mapping FTL and the block-mapping FTL, the hybrid-mapping FTL is proposed to store data to the appropriate mapping mechanism by switching the mapping information between the page-mapping mechanism and the block-mapping mechanism. In the article, we propose a joint operation mechanism to rethink the advantages of the page-mapping FTL, the block-mapping FTL, and the hybrid-mapping FTL. With the joint operation mechanism, a flash translation layer can consider the main memory requirements, improve the system performance, and reduce the garbage collection overhead. The experimental results show that the proposed joint operation mechanism can achieve the goal under realistic workloads and benchmarks.

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Cited By

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  • (2023)A Granularity-Based Clustering Method for Reducing Write Amplification in Solid-State DrivesACM Transactions on Embedded Computing Systems10.1145/360577922:4(1-32)Online publication date: 21-Jun-2023
  • (2017)A demand-based caching method for garbage collection in flash-memory embedded systems2017 IEEE 6th Global Conference on Consumer Electronics (GCCE)10.1109/GCCE.2017.8229472(1-5)Online publication date: Oct-2017
  • (2017)Rethink the Design of Flash Translation Layers in a Component-Based ViewIEEE Access10.1109/ACCESS.2017.27185595(12895-12912)Online publication date: 2017
  • Show More Cited By

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Published In

cover image ACM Transactions on Embedded Computing Systems
ACM Transactions on Embedded Computing Systems  Volume 15, Issue 4
Special Issue on ESWEEK2015 and Regular Papers
August 2016
411 pages
ISSN:1539-9087
EISSN:1558-3465
DOI:10.1145/2982215
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Publication History

Published: 02 August 2016
Accepted: 01 April 2016
Revised: 01 January 2016
Received: 01 February 2015
Published in TECS Volume 15, Issue 4

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Author Tags

  1. NAND flash memory
  2. embedded systems
  3. flash translation layers
  4. storage systems

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  • Research-article
  • Research
  • Refereed

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  • Ministry of Science and Technology

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Cited By

View all
  • (2023)A Granularity-Based Clustering Method for Reducing Write Amplification in Solid-State DrivesACM Transactions on Embedded Computing Systems10.1145/360577922:4(1-32)Online publication date: 21-Jun-2023
  • (2017)A demand-based caching method for garbage collection in flash-memory embedded systems2017 IEEE 6th Global Conference on Consumer Electronics (GCCE)10.1109/GCCE.2017.8229472(1-5)Online publication date: Oct-2017
  • (2017)Rethink the Design of Flash Translation Layers in a Component-Based ViewIEEE Access10.1109/ACCESS.2017.27185595(12895-12912)Online publication date: 2017
  • (2016)Collaboration of Merge Operations in Hybrid-Mapped Flash Translation Layers with the Multi-Controller DesignProceedings of the International Conference on Research in Adaptive and Convergent Systems10.1145/2987386.2987395(181-186)Online publication date: 11-Oct-2016

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