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Energy-aware cosynthesis of real-time multimedia applications on MPSoCs using heterogeneous scheduling policies

Published: 29 January 2008 Publication History

Abstract

Real-time multimedia applications are increasingly being mapped onto MPSoC (multiprocessor system-on-chip) platforms containing hardware--software IPs (intellectual property), along with a library of common scheduling policies such as EDF, RM. The choice of a scheduling policy for each IP is a key decision that greatly affects the design's ability to meet real-time constraints, and also directly affects the energy consumed by the design. We present a cosynthesis framework for design space exploration that considers heterogeneous scheduling while mapping multimedia applications onto such MPSoCs. In our approach, we select a suitable scheduling policy for each IP such that system energy is minimized—our framework also includes energy-reduction techniques utilizing dynamic power management. Experimental results on a realistic multimode multimedia terminal application demonstrate that our approach enables us to select design points with up to 60.5% reduced energy for a given area constraint, while meeting all real-time requirements. More importantly, our approach generates a tradeoff space between energy and cost allowing designers to comparatively evaluate multiple system level mappings.

References

[1]
Baruah, S. K. 2004. Cost efficient synthesis of real-time systems upon heterogeneous multiprocessor platforms. In WPDRTS '04: Proceedings of the 14th International Workshop on Parallel and Distributed Real-Time Systems. 120b.
[2]
Benini, L., Bogliolo, A., and Micheli, G. D. 2000. A survey of design techniques for system-level dynamic power management. IEEE Trans. Very Large Scale Integr. Syst. 8, 3, 299--316.
[3]
Bijlsma, T., Wolkotte, P. T., and Smit, G. J. 2006. An optimal architecture for a DDC. In RAW '06: Proceedings of the 20th International Parallel & Distributed Processing Symposium Reconfigurable Architectures Workshop.
[4]
Buttazzo, G. C. 2005. Rate monotonic vs. EDF: Judgment day. Real-Time Syst. 29, 1, 5--26.
[5]
Fiduccia, C. M. and Mattheyses, R. M. 1982. A linear time heuristic for improved network partitions. In DAC '04: Proceedings of the 19th Annual Conference on Design Automation. 241--247.
[6]
Flautner, K., Flynn, D., Roberts, D., and Patel, D. I. 2004. IEM926: An energy efficient SoC with dynamic voltage scaling. In DATE '04: Proceedings of the Design, Automation and Test in Europe Conference and Exposition. 324--329.
[7]
Helmig, J. Texas Instruments, 2002. Developing Core Software Technologies for TI's OMAP Platform.
[8]
Hill, S. 2001. The ARM10 family of advanced embedded microprocessor cores. In HotChips '01: A Symposium on High Performance Chips.
[9]
Kernighan, B. W. and Lin, S. 1970. An efficient heuristic procedure for partitioning graphs. Bell Sys. Tech. J. 49, 2, 291--308.
[10]
Kim, M., Banerjee, S., Dutt, N., and Venkatasubramanian, N. 2006. Design space exploration of real-time multimedia MPSoCs with heterogeneous scheduling policies. In CODES+ISSS '06: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis. 16--21.
[11]
Liu, C. L. and Layland, J. W. 1973. Scheduling algorithms for multiprogramming in a hard-real-time environment. J. ACM 20, 1, 46--61.
[12]
Marculescu, R., Nandi, A., Lavagno, L., and Sangiovanni-Vincentelli, A. L. 2001. System-level power/performance analysis of portable multimedia systems communicating over wireless channels. In ICCAD '01: Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design. 207--214.
[13]
Matic, S. and Henzinger, T. A. 2005. Trading end-to-end latency for composability. In RTSS '05: Proceedings of the 26th IEEE International Real-Time Systems Symposium. 99--110.
[14]
NXP. Nexperia Processor http://www.nxp.com/products/nexperia/home.
[15]
Oh, H. and Ha, S. 1996. A static scheduling heuristic for heterogeneous processors. In Euro-Par '96: Proceedings of the Second International Euro-Par Conference on Parallel Processing-Volume II. 573--577.
[16]
Oh, H. and Ha, S. 2002. Hardware-software cosynthesis of multimode multi-task embedded systems with real-time constraints. In CODES '02: Proceedings of the 10th International Symposium on Hardware/software Codesign. 133--138.
[17]
Pham, D., Anderson, H.-W., Behnen, E., Bolliger, M., Gupta, S., Hofstee, P., Harvey, P., Johns, C., Kahle, J., Kameyama, A., Keaty, J., Le, B., Lee, S., Nguyen, T., Petrovick, J., Pham, M., Pille, J., Posluszny, S., Riley, M., Verock, J., Warnock, J., Weitzel, S., and Wendel, D. 2006. Key features of the design methodology enabling a multi-core soc implementation of a first-generation cell processor. In Proceedings of the Conference on Asia South Pacific Design Automation (ASP-DAC'06). 871--878.
[18]
Pop, P., Eles, P., Peng, Z., and Pop, T. 2006. Analysis and optimization of distributed real-time embedded systems. ACM Trans. Des. Autom. Electron. Syst. 11, 3, 593--625.
[19]
Schmitz, M. T., Al-Hashimi, B. M., and Eles, P. 2005. Cosynthesis of energy-efficient multimode embedded systems with consideration of mode-execution probabilities. IEEE Trans. on CAD of Integrated Circuits and Systems 24, 2, 153--169.
[20]
Shin, I. and Lee, I. 2003. Periodic resource model for compositional real-time guarantees. In RTSS '03: Proceedings of the 24th IEEE International Real-Time Systems Symposium. 2--13.
[21]
Shin, I. and Lee, I. 2004. Compositional real-time scheduling framework. In RTSS '04: Proceedings of the 25th IEEE International Real-Time Systems Symposium. 57--67.
[22]
STMicroelectronics. ST Nomadik Multimedia Processor http://www.st.com/nomadik.
[23]
Wolf, W. 2004. The future of multiprocessor systems-on-chips. In DAC '04: Proceedings of the 41st Annual Conference on Design Automation. 681--685.
[24]
Yang, P., Wong, C., Marchal, P., Catthoor, F., Desmet, D., Verkest, D., and Lauwereins, R. 2001. Energy-aware runtime scheduling for embedded-multiprocessor SOCs. IEEE Des. Test 18, 5, 46--58.

Cited By

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  • (2017)Run-time mapping algorithm for dynamic workloads using process merging transformations2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)10.1109/SAMOS.2017.8344627(188-195)Online publication date: Jul-2017
  • (2014)Energy-aware task mapping and scheduling for reliable embedded computing systemsACM Transactions on Embedded Computing Systems10.1145/2544375.254439213:2s(1-27)Online publication date: 27-Jan-2014
  • (2014)A memory-first language and model for hardware-software cosynthesisProceedings of the 2014 Electronic System Level Synthesis Conference (ESLsyn)10.1109/ESLsyn.2014.6850381(1-6)Online publication date: May-2014
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      cover image ACM Transactions on Embedded Computing Systems
      ACM Transactions on Embedded Computing Systems  Volume 7, Issue 2
      February 2008
      412 pages
      ISSN:1539-9087
      EISSN:1558-3465
      DOI:10.1145/1331331
      Issue’s Table of Contents
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 29 January 2008
      Accepted: 01 May 2007
      Received: 01 December 2006
      Published in TECS Volume 7, Issue 2

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      Author Tags

      1. MPSoC
      2. Real-time scheduling
      3. cosynthesis
      4. energy

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      Cited By

      View all
      • (2017)Run-time mapping algorithm for dynamic workloads using process merging transformations2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)10.1109/SAMOS.2017.8344627(188-195)Online publication date: Jul-2017
      • (2014)Energy-aware task mapping and scheduling for reliable embedded computing systemsACM Transactions on Embedded Computing Systems10.1145/2544375.254439213:2s(1-27)Online publication date: 27-Jan-2014
      • (2014)A memory-first language and model for hardware-software cosynthesisProceedings of the 2014 Electronic System Level Synthesis Conference (ESLsyn)10.1109/ESLsyn.2014.6850381(1-6)Online publication date: May-2014
      • (2013)Aging-aware hardware-software task partitioning for reliable reconfigurable multiprocessor systemsProceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems10.5555/2555729.2555730(1-10)Online publication date: 29-Sep-2013
      • (2013)Estado comparativo de las masas de Pinus uncinata Ram. potencialmente protectoras frente a aludes de una zona de Andorra y CataluñaPirineos10.3989/Pirineos.2013.168003168(39-57)Online publication date: 30-May-2013
      • (2013)Accelerating throughput-aware runtime mapping for heterogeneous MPSoCsACM Transactions on Design Automation of Electronic Systems10.1145/2390191.239020018:1(1-29)Online publication date: 16-Jan-2013
      • (2013)Aging-aware hardware-software task partitioning for reliable reconfigurable multiprocessor systems2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES)10.1109/CASES.2013.6662505(1-10)Online publication date: Sep-2013
      • (2013)Multi-mode pipelined MPSoCs for streaming applications2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2013.6509601(231-236)Online publication date: Jan-2013
      • (2013)CADSEFrontiers of Computer Science: Selected Publications from Chinese Universities10.1007/s11704-013-2196-17:3(416-430)Online publication date: 1-Jun-2013
      • (2013)Multi-mode Pipelined MPSoCsPipelined Multiprocessor System-on-Chip for Multimedia10.1007/978-3-319-01113-4_8(147-162)Online publication date: 26-Nov-2013
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