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- Loh GJerger NKannan AEckert Y(2015)Interconnect-Memory Challenges for Multi-chip, Silicon Interposer SystemsProceedings of the 2015 International Symposium on Memory Systems10.1145/2818950.2818951(3-10)Online publication date: 5-Oct-2015
- Tada J(2014)Performance evaluation of 3-D stacked 32-bit parallel multipliersACM SIGARCH Computer Architecture News10.1145/2641361.264137641:5(89-94)Online publication date: 18-Jun-2014
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