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An adaptive timing-driven layout for high speed VLSI

Authors:

Suphachai Sutanthavibul,

Eugene ShragowitzAuthors Info & Claims

DAC '90: Proceedings of the 27th ACM/IEEE Design Automation Conference

Pages 90 - 95

https://doi.org/10.1145/123186.123233

Published: 03 January 1991 Publication History

Abstract

An adaptive timing-driven layout system, called JUNE, has been developed. The constructive algorithm, which combines placement with the global routing, constructs a placement satisfying timing and routability constraints. The placement problem for each macro is solved hierarchically as a sequence of two optimization problems followed by an adaptive correction procedure. Experimental results for industrial sea-of-gates chips confirmed effectiveness of this approach.

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Cited By

Cho JSarrafzadeh M(1999)Vlsi Circuit LayoutWiley Encyclopedia of Electrical and Electronics Engineering10.1002/047134608X.W1801Online publication date: 27-Dec-1999
https://doi.org/10.1002/047134608X.W1801
Boese KKahng AMcCoy BRobins GLorenzetti M(1994)Rectilinear Steiner trees with minimum Elmore delayProceedings of the 31st annual Design Automation Conference10.1145/196244.196428(381-386)Online publication date: 6-Jun-1994
https://dl.acm.org/doi/10.1145/196244.196428
Cong JLeung KLightner MJess J(1993)Optimal wiresizing under the distributed Elmore delay modelProceedings of the 1993 IEEE/ACM international conference on Computer-aided design10.5555/259794.259893(634-639)Online publication date: 7-Nov-1993
https://dl.acm.org/doi/10.5555/259794.259893
Show More Cited By

Index Terms

An adaptive timing-driven layout for high speed VLSI
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
  2. Very large scale integration design

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Published In

cover image ACM Conferences

DAC '90: Proceedings of the 27th ACM/IEEE Design Automation Conference

January 1991

742 pages

ISBN:0897913639

DOI:10.1145/123186

Chairman:
Richard C. Smith

Copyright © 1991 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS: Computer Society

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 03 January 1991

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DAC90: The 27th ACM/IEEE-CS Design Automation Conference

June 24 - 27, 1990

Florida, Orlando, USA

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DAC '90 Paper Acceptance Rate 125 of 427 submissions, 29%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Cho JSarrafzadeh M(1999)Vlsi Circuit LayoutWiley Encyclopedia of Electrical and Electronics Engineering10.1002/047134608X.W1801Online publication date: 27-Dec-1999
https://doi.org/10.1002/047134608X.W1801
Boese KKahng AMcCoy BRobins GLorenzetti M(1994)Rectilinear Steiner trees with minimum Elmore delayProceedings of the 31st annual Design Automation Conference10.1145/196244.196428(381-386)Online publication date: 6-Jun-1994
https://dl.acm.org/doi/10.1145/196244.196428
Cong JLeung KLightner MJess J(1993)Optimal wiresizing under the distributed Elmore delay modelProceedings of the 1993 IEEE/ACM international conference on Computer-aided design10.5555/259794.259893(634-639)Online publication date: 7-Nov-1993
https://dl.acm.org/doi/10.5555/259794.259893
Huang JHong XCheng CKuh EDunlop A(1993)An efficient timing-driven global routing algorithmProceedings of the 30th international Design Automation Conference10.1145/157485.165063(596-600)Online publication date: 1-Jul-1993
https://dl.acm.org/doi/10.1145/157485.165063
Hamada TCheng CChau PDunlop A(1993)PrimeProceedings of the 30th international Design Automation Conference10.1145/157485.165015(531-536)Online publication date: 1-Jul-1993
https://dl.acm.org/doi/10.1145/157485.165015
Lim ACheng SWu CDunlop A(1993)Performance oriented rectilinear Steiner treesProceedings of the 30th international Design Automation Conference10.1145/157485.164656(171-176)Online publication date: 1-Jul-1993
https://dl.acm.org/doi/10.1145/157485.164656
Lin RShragowitz ESchweikert D(1992)Fuzzy logic approach to placement problemProceedings of the 29th ACM/IEEE Design Automation Conference10.5555/113938.119626(153-158)Online publication date: 1-Jul-1992
https://dl.acm.org/doi/10.5555/113938.119626
Sutanthavibul SShragowitz ENewton A(1991)Dynamic prediction of critical paths and nets for constructive timing-driven placementProceedings of the 28th ACM/IEEE Design Automation Conference10.1145/127601.127165(632-635)Online publication date: 1-Jun-1991
https://dl.acm.org/doi/10.1145/127601.127165
Benkoski JStrojwas ANewton A(1991)The role of timing verification in layout synthesisProceedings of the 28th ACM/IEEE Design Automation Conference10.1145/127601.122895(612-619)Online publication date: 1-Jun-1991
https://dl.acm.org/doi/10.1145/127601.122895

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