Accelerating UNISIM-Based Cycle-Level Microarchitectural Simulations on Multicore Platforms
Article No.: 26, Pages 1 - 25
Abstract
UNISIM has been shown to ease the development of simulators for multi-/many-core systems. However, UNISIM cycle-level simulations of large-scale multiprocessor systems could be very time consuming. In this article, we propose a systematic framework for accelerating UNISIM cycle-level simulations on multicore platforms. The proposed framework relies on exploiting the fine-grained parallelism within the simulated cycles using POSIX threads. A multithreaded simulation engine has been devised from the single-threaded UNISIM SystemC engine to facilitate the exploitation of inherent parallelism. An adaptive technique that manages the overall computation workload by adjusting the number of threads employed at any given time is proposed. In addition, we have introduced a technique to balance the workloads of multithreaded executions. This load balancing involves the distributions of SystemC objects among threads. A graph-partitioning-based technique has been introduced to automate such distributions. Finally, two strategies are proposed for realizing nonautomated and fully automated adaptive multithreaded simulations, respectively. Our investigations show that notable acceleration can be achieved by deploying the proposed framework. In particular, we show that simulations on an 8-core multicore platform can provide for close to 6X speedups when simulating many-core systems with large number of cores.
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Index Terms
- Accelerating UNISIM-Based Cycle-Level Microarchitectural Simulations on Multicore Platforms
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Publication History
Published: 01 June 2011
Accepted: 01 February 2011
Revised: 01 October 2010
Received: 01 March 2010
Published in TODAES Volume 16, Issue 3
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