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On NBTI Degradation Process in Digital Logic Circuits

Published: 06 January 2007 Publication History

Abstract

Negative bias temperature instability (NBTI) has been identified as one of most critical and most pressing degradation issues in nano-scale technologies. Yet most current studies published in literature on NBTI degradation have been limited to either at the device physics level or at the computer architecture level. This paper provides a first in depth study of the NBTI degradation process at the logic level in digital circuits. It demonstrates that the methods used in the existing studies lead to unduly pessimistic results and therefore they must be modified. The paper also compares the effectiveness of some of the known solutions that address NBTI degradation. Several new conclusions are drawn from our study which are important and help identify new research directions that can be taken in view of the more realistic assumptions made in this paper.

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  • (2008)A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM LifetimeACM SIGARCH Computer Architecture News10.1145/1394608.138215136:3(353-362)Online publication date: 1-Jun-2008
  • (2008)A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM LifetimeProceedings of the 35th Annual International Symposium on Computer Architecture10.1109/ISCA.2008.30(353-362)Online publication date: 21-Jun-2008

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          cover image Guide Proceedings
          VLSID '07: Proceedings of the 20th International Conference on VLSI Design held jointly with 6th International Conference: Embedded Systems
          January 2007
          922 pages
          ISBN:0769527620

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          IEEE Computer Society

          United States

          Publication History

          Published: 06 January 2007

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          • (2008)A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM LifetimeACM SIGARCH Computer Architecture News10.1145/1394608.138215136:3(353-362)Online publication date: 1-Jun-2008
          • (2008)A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM LifetimeProceedings of the 35th Annual International Symposium on Computer Architecture10.1109/ISCA.2008.30(353-362)Online publication date: 21-Jun-2008

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