Article

A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime

Authors:

Timothy M. PinkstonAuthors Info & Claims

ISCA '08: Proceedings of the 35th Annual International Symposium on Computer Architecture

Pages 353 - 362

https://doi.org/10.1109/ISCA.2008.30

Published: 01 June 2008 Publication History

Abstract

Microarchitectural redundancy has been proposed as a means of improving chip lifetime reliability. It is typically used in a reactive way, allowing chips to maintain operability in the presence of failures by detecting and isolating, correcting, and/or replacing components on a first-come, first-served basis only after they become faulty. In this paper, we explore an alternative, more preferred method of exploiting microarchitectural redundancy to enhance chip lifetime reliability. In our proposed approach, redundancy is used proactively to allow non-faulty microarchitecture components to be temporarily deactivated, on a rotating basis, to suspend and/or recover from certain wearout effects. This approach improves chip lifetime reliability by warding off the onset of wearout failures as opposed to reacting to them posteriorly. Applied to on-chip cache SRAM for combating NBTI-induced wearout failure, our proactive wearout recovery approach increases lifetime reliability (measured in mean-time-to-failure) of the cache by about a factor of seven relative to no use of microarchitectural redundancy and a factor of five relative to conventional reactive use of redundancy having similar area overhead.

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Guo XStan M(2017)Implications of accelerated self-healing as a key design knob for cross-layer resilienceIntegration, the VLSI Journal10.1016/j.vlsi.2016.10.00856:C(167-180)Online publication date: 1-Jan-2017
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Ashraf RKhoshavi NAlzahrani ADeMara RKiamehr STahoori MPalermo GFeo JTumeo AFranke H(2016)Area-energy tradeoffs of logic wear-leveling for BTI-induced agingProceedings of the ACM International Conference on Computing Frontiers10.1145/2903150.2903171(37-44)Online publication date: 16-May-2016
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Sengupta DMishra VSapatnekar S(2016)Invited - Optimizing device reliability effects at the intersection of physics, circuits, and architectureProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2905016(1-6)Online publication date: 5-Jun-2016
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A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime
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Published In

cover image ACM Conferences

ISCA '08: Proceedings of the 35th Annual International Symposium on Computer Architecture

June 2008

449 pages

ISBN:9780769531748

ACM SIGARCH Computer Architecture News Volume 36, Issue 3
June 2008
449 pages
ISSN:0163-5964
DOI:10.1145/1394608
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SIGARCH: ACM Special Interest Group on Computer Architecture

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IEEE Computer Society

United States

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Published: 01 June 2008

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ISCA08: The 35th Annual International Symposium on Computer Architecture

June 21 - 25, 2008

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ISCA '08 Paper Acceptance Rate 37 of 259 submissions, 14%;

Overall Acceptance Rate 543 of 3,203 submissions, 17%

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Cited By

Guo XStan M(2017)Implications of accelerated self-healing as a key design knob for cross-layer resilienceIntegration, the VLSI Journal10.1016/j.vlsi.2016.10.00856:C(167-180)Online publication date: 1-Jan-2017
https://dl.acm.org/doi/10.1016/j.vlsi.2016.10.008
Ashraf RKhoshavi NAlzahrani ADeMara RKiamehr STahoori MPalermo GFeo JTumeo AFranke H(2016)Area-energy tradeoffs of logic wear-leveling for BTI-induced agingProceedings of the ACM International Conference on Computing Frontiers10.1145/2903150.2903171(37-44)Online publication date: 16-May-2016
https://dl.acm.org/doi/10.1145/2903150.2903171
Sengupta DMishra VSapatnekar S(2016)Invited - Optimizing device reliability effects at the intersection of physics, circuits, and architectureProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2905016(1-6)Online publication date: 5-Jun-2016
https://dl.acm.org/doi/10.1145/2897937.2905016
Valero AMiralaei NPetit SSahuquillo JJones T(2016)Enhancing the L1 Data Cache Design to Mitigate HCIIEEE Computer Architecture Letters10.1109/LCA.2015.246073615:2(93-96)Online publication date: 1-Jul-2016
https://dl.acm.org/doi/10.1109/LCA.2015.2460736
Gnad DShafique MKriebel FRehman SSun DHenkel J(2015)HayatProceedings of the 52nd Annual Design Automation Conference10.1145/2744769.2744849(1-6)Online publication date: 7-Jun-2015
https://dl.acm.org/doi/10.1145/2744769.2744849
Shafique MKhan MTüfek OHenkel J(2015)EnAAMProceedings of the 52nd Annual Design Automation Conference10.1145/2744769.2744834(1-6)Online publication date: 7-Jun-2015
https://dl.acm.org/doi/10.1145/2744769.2744834
Zhang YChen SPeng LChen S(2015)NBTI alleviation on FinFET-made GPUs by utilizing device heterogeneityIntegration, the VLSI Journal10.1016/j.vlsi.2015.04.00351:C(10-20)Online publication date: 1-Sep-2015
https://dl.acm.org/doi/10.1016/j.vlsi.2015.04.003
Guo XBurleson WStan M(2014)Modeling and Experimental Demonstration of Accelerated Self-Healing TechniquesProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2593162(1-6)Online publication date: 1-Jun-2014
https://dl.acm.org/doi/10.1145/2593069.2593162
Pouyan PAmat EMoll FRubio AMacii E(2013)Design and implementation of an adaptive proactive reconfiguration technique for SRAM cachesProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485600(1303-1306)Online publication date: 18-Mar-2013
https://dl.acm.org/doi/10.5555/2485288.2485600
Gupta SSapatnekar S(2013)Employing circadian rhythms to enhance power and reliabilityACM Transactions on Design Automation of Electronic Systems10.1145/2491477.249148218:3(1-23)Online publication date: 29-Jul-2013
https://dl.acm.org/doi/10.1145/2491477.2491482
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