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Efficient Spatial Variation Modeling of Nanoscale Integrated Circuits Via Hidden Markov Tree

Published: 01 June 2016 Publication History

Abstract

In this paper, we propose a novel spatial variation modeling method based on hidden Markov tree (HMT) for nanoscale integrated circuits, which could efficiently improve the accuracy of full-wafer/chip spatial variations recovery at extremely low measurement cost. Applying this method, HMT is introduced to set up a statistical model for coefficients after exploring the underlying correlated representation of the spatial variation in the frequency domain. Accordingly, two key inherent properties of the modeling coefficients, i.e., correlations and sparse presentations in the frequency domain, can be captured exactly and the modeling accuracy can be improved evidently. Then, maximum-<italic>a-posteriori</italic> estimation is applied to formulate the original problem as a convex optimization that could be solved efficiently and robustly. Numerical results based on industrial data demonstrate that the proposed method can achieve superior accuracy over other existing approaches including orthogonal matching pursuit, <inline-formula> <tex-math notation="LaTeX">${l} _{1}$ </tex-math></inline-formula>-norm regularization, and reweighted <inline-formula> <tex-math notation="LaTeX">${l} _{1}$ </tex-math></inline-formula>-norm regularization.

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        cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
        IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  Volume 35, Issue 6
        June 2016
        175 pages

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        Published: 01 June 2016

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