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Routability-driven white space allocation for fixed-die standard-cell placement

Published: 01 November 2006 Publication History

Abstract

The use of white space in fixed-die standard-cell placement is an effective way to improve routability. In this paper, we present a white space allocation approach that dynamically assigns white space according to the congestion distribution of the placement. In the top-down placement flow, white space is assigned to congested regions using smooth allocating functions. A post-allocation optimization step is taken to further improve placement quality. Experimental results show that the proposed allocation approach, combined with a multilevel placement flow, significantly improves placement routability and layout quality. A set of approaches for white space allocation has been presented and compared in this paper. All of them are based on routability-driven methods. However, these approaches vary in the allocation function and allocation aggressiveness. All the placement results are investigated by feeding them into a widely used industrial router (Warp Route of Cadence). Comparisons have been made between: 1) placement with or without white space allocation; 2) different white space allocation approaches; and 3) our placement flow, industrial placement tool, and the other state-of-the-art academic placement tool.

Cited By

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  • (2021)OptiPlace: optimized placement solution for mixed-size designsAnalog Integrated Circuits and Signal Processing10.1007/s10470-021-01864-5109:3(501-515)Online publication date: 1-Dec-2021
  • (2019)Obfuscated Built-In Self-Authentication With Secure and Efficient Wire-LiftingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.287701238:11(1981-1994)Online publication date: 21-Oct-2019
  • (2017)Securing Split Manufactured ICs with Wire Lifting Obfuscated Built-In Self-AuthenticationProceedings of the Great Lakes Symposium on VLSI 201710.1145/3060403.3060588(339-344)Online publication date: 10-May-2017
  • Show More Cited By

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cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  Volume 22, Issue 4
November 2006
127 pages

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IEEE Press

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Published: 01 November 2006

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Cited By

View all
  • (2021)OptiPlace: optimized placement solution for mixed-size designsAnalog Integrated Circuits and Signal Processing10.1007/s10470-021-01864-5109:3(501-515)Online publication date: 1-Dec-2021
  • (2019)Obfuscated Built-In Self-Authentication With Secure and Efficient Wire-LiftingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.287701238:11(1981-1994)Online publication date: 21-Oct-2019
  • (2017)Securing Split Manufactured ICs with Wire Lifting Obfuscated Built-In Self-AuthenticationProceedings of the Great Lakes Symposium on VLSI 201710.1145/3060403.3060588(339-344)Online publication date: 10-May-2017
  • (2017)Routability Optimization for Industrial Designs at Sub-14nm Process Nodes Using Machine LearningProceedings of the 2017 ACM on International Symposium on Physical Design10.1145/3036669.3036681(15-21)Online publication date: 19-Mar-2017
  • (2016)Ripple 2.0ACM Transactions on Design Automation of Electronic Systems10.1145/292598922:1(1-26)Online publication date: 2-Sep-2016
  • (2014)MIP-based detailed placer for mixed-size circuitsProceedings of the 2014 on International symposium on physical design10.1145/2560519.2560526(11-18)Online publication date: 30-Mar-2014
  • (2013)Ripple 2.0Proceedings of the 50th Annual Design Automation Conference10.1145/2463209.2488922(1-6)Online publication date: 29-May-2013
  • (2013)SRPProceedings of the 2013 ACM International symposium on Physical Design10.1145/2451916.2451943(108-113)Online publication date: 24-Mar-2013
  • (2012)Progress and challenges in VLSI placement researchProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429441(275-282)Online publication date: 5-Nov-2012
  • (2012)GDRouterProceedings of the 49th Annual Design Automation Conference10.1145/2228360.2228469(597-602)Online publication date: 3-Jun-2012
  • Show More Cited By

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