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- Zhang YChakraborty AChowdhury SPan DHu A(2012)Reclaiming over-the-IP-block routing resources with buffering-aware rectilinear Steiner minimum tree constructionProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429410(137-143)Online publication date: 5-Nov-2012
- Liu WLi YChen HLin Y(2010)Minimizing clock latency range in robust clock tree synthesisProceedings of the 2010 Asia and South Pacific Design Automation Conference10.5555/1899721.1899817(389-394)Online publication date: 18-Jan-2010
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