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Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture

Published: 01 July 2010 Publication History

Abstract

Flash memory solid-state disks (SSDs) are replacing hard disk drives (HDDs) in mobile computing systems because of their lower power consumption, faster random access, and greater shock resistance. We describe Hydra, a high-performance flash memory SSD architecture that translates the parallelism inherent in multiple flash memory chips into improved performance, by means of both bus-level and chip-level interleaving. Hydra has a prioritized structure of memory controllers, consisting of a single high-priority foreground unit, to deal with read requests, and multiple background units, all capable of autonomous execution of sequences of high-level flash memory operations. Hydra also employs an aggressive write buffering mechanism based on block mapping to ensure that multiple flash memory chips are used effectively, and also to expedite the processing of write requests. Performance evaluation of an FPGA implementation of the Hydra SSD architecture shows that its performance is more than 80 percent better than the best of the comparable HDDs and SSDs that we considered.

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  • (2020)Design of a Host Interface Logic for GC-Free SSDsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.291903539:8(1674-1687)Online publication date: 1-Aug-2020
  • (2020)Maximizing I/O Throughput and Minimizing Performance Variation via Reinforcement Learning Based I/O Merging for SSDsIEEE Transactions on Computers10.1109/TC.2019.293895669:1(72-86)Online publication date: 1-Jan-2020
  • (2018)HILACM Transactions on Storage10.1145/328103014:4(1-29)Online publication date: 4-Dec-2018
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  1. Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture

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    Published In

    cover image IEEE Transactions on Computers
    IEEE Transactions on Computers  Volume 59, Issue 7
    July 2010
    144 pages

    Publisher

    IEEE Computer Society

    United States

    Publication History

    Published: 01 July 2010

    Author Tags

    1. Flash memory
    2. Flash memory, flash translation layer (FTL), solid-state disk (SSD), storage system.
    3. flash translation layer (FTL)
    4. solid-state disk (SSD)
    5. storage system.

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    Cited By

    View all
    • (2020)Design of a Host Interface Logic for GC-Free SSDsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.291903539:8(1674-1687)Online publication date: 1-Aug-2020
    • (2020)Maximizing I/O Throughput and Minimizing Performance Variation via Reinforcement Learning Based I/O Merging for SSDsIEEE Transactions on Computers10.1109/TC.2019.293895669:1(72-86)Online publication date: 1-Jan-2020
    • (2018)HILACM Transactions on Storage10.1145/328103014:4(1-29)Online publication date: 4-Dec-2018
    • (2018)Exploiting Internal Parallelism for Address Translation in Solid-State DrivesACM Transactions on Storage10.1145/323956414:4(1-30)Online publication date: 15-Dec-2018
    • (2017)SUPAACM Transactions on Storage10.1145/312990113:4(1-30)Online publication date: 14-Nov-2017
    • (2017)GeminiInternational Journal of Parallel Programming10.1007/s10766-016-0449-y45:4(923-945)Online publication date: 1-Aug-2017
    • (2016)Improving Resource Efficiency at Scale with HeraclesACM Transactions on Computer Systems10.1145/288278334:2(1-33)Online publication date: 5-May-2016
    • (2016)Stable GreedyACM Transactions on Embedded Computing Systems10.1145/282061315:1(1-25)Online publication date: 13-Jan-2016
    • (2016)Exploiting Page Correlations for Write Buffering in Page-Mapping Multichannel SSDsACM Transactions on Embedded Computing Systems10.1145/281562215:1(1-25)Online publication date: 13-Jan-2016
    • (2016)In-storage processing of database scans and joinsInformation Sciences: an International Journal10.1016/j.ins.2015.07.056327:C(183-200)Online publication date: 10-Jan-2016
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