research-article

Building Ultralow-Latency Interconnection Networks Using Photonic Integration

Authors:

Keren BergmanAuthors Info & Claims

IEEE Micro, Volume 27, Issue 4

Pages 6 - 20

https://doi.org/10.1109/MM.2007.64

Published: 01 July 2007 Publication History

Abstract

Ultralow-latency interconnection networks have become a necessity in modern high-performance computing systems. Recent advances in photonic integration technology are paving the way for a disruptive step in the design of these networks. We present SPINet, an optical interconnection network architecture designed for implementation using photonic integration, providing an end-to-end photonic path while completely avoiding optical buffering. SPINet resolves contentions through message dropping, but facilitates message recovery using a novel physical-layer acknowledgment protocol.

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Cited By

Nezhadi AKoohi S(2019)OMUXOptical Switching and Networking10.1016/j.osn.2019.01.00233:C(1-12)Online publication date: 1-Jul-2019
https://dl.acm.org/doi/10.1016/j.osn.2019.01.002
Andreades PClark KWatts PZervas G(2019)Experimental demonstration of an ultra-low latency control plane for optical packet switching in data center networksOptical Switching and Networking10.1016/j.osn.2018.11.00532:C(51-60)Online publication date: 1-Apr-2019
https://dl.acm.org/doi/10.1016/j.osn.2018.11.005
Savidis ICiftcioglu BXu JHu JJain MBerman RXue JLiu PMoore DWicks GHuang MWu HFriedman E(2016)Heterogeneous 3-D circuitsMicroelectronics Journal10.1016/j.mejo.2015.10.00450:C(66-75)Online publication date: 1-Apr-2016
https://dl.acm.org/doi/10.1016/j.mejo.2015.10.004
Show More Cited By

Index Terms

Building Ultralow-Latency Interconnection Networks Using Photonic Integration
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Interconnection architectures
2. Hardware
  1. Integrated circuits
    1. Interconnect

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Information & Contributors

Information

Published In

cover image IEEE Micro

IEEE Micro Volume 27, Issue 4

July 2007

58 pages

ISSN:0272-1732

Issue’s Table of Contents

Copyright © 2007.

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 July 2007

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Cited By

Nezhadi AKoohi S(2019)OMUXOptical Switching and Networking10.1016/j.osn.2019.01.00233:C(1-12)Online publication date: 1-Jul-2019
https://dl.acm.org/doi/10.1016/j.osn.2019.01.002
Andreades PClark KWatts PZervas G(2019)Experimental demonstration of an ultra-low latency control plane for optical packet switching in data center networksOptical Switching and Networking10.1016/j.osn.2018.11.00532:C(51-60)Online publication date: 1-Apr-2019
https://dl.acm.org/doi/10.1016/j.osn.2018.11.005
Savidis ICiftcioglu BXu JHu JJain MBerman RXue JLiu PMoore DWicks GHuang MWu HFriedman E(2016)Heterogeneous 3-D circuitsMicroelectronics Journal10.1016/j.mejo.2015.10.00450:C(66-75)Online publication date: 1-Apr-2016
https://dl.acm.org/doi/10.1016/j.mejo.2015.10.004
Van Laer AEllawala CMadarbux MWatts PJones TNebel WAtienza D(2015)Coherence based message prediction for optically interconnected chip multiprocessorsProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition10.5555/2755753.2755892(613-616)Online publication date: 9-Mar-2015
https://dl.acm.org/doi/10.5555/2755753.2755892
Yang QNajjar WYavatkar RRixner S(2013)Re-design of path synchronization for minimal latency data vortex optical interconnection networkProceedings of the ninth ACM/IEEE symposium on Architectures for networking and communications systems10.5555/2537857.2537871(105-106)Online publication date: 21-Oct-2013
https://dl.acm.org/doi/10.5555/2537857.2537871
Xue JGarg ACiftcioglu BHu JWang SSavidis IJain MBerman RLiu PHuang MWu HFriedman EWicks GMoore D(2010)An intra-chip free-space optical interconnectACM SIGARCH Computer Architecture News10.1145/1816038.181597538:3(94-105)Online publication date: 19-Jun-2010
https://dl.acm.org/doi/10.1145/1816038.1815975
Xue JGarg ACiftcioglu BHu JWang SSavidis IJain MBerman RLiu PHuang MWu HFriedman EWicks GMoore DSeznec AWeiser URonen R(2010)An intra-chip free-space optical interconnectProceedings of the 37th annual international symposium on Computer architecture10.1145/1815961.1815975(94-105)Online publication date: 19-Jun-2010
https://dl.acm.org/doi/10.1145/1815961.1815975
Kim JDally WScott SAbts D(2008)Technology-Driven, Highly-Scalable Dragonfly TopologyACM SIGARCH Computer Architecture News10.1145/1394608.138212936:3(77-88)Online publication date: 1-Jun-2008
https://dl.acm.org/doi/10.1145/1394608.1382129
Kim JDally WScott SAbts D(2008)Technology-Driven, Highly-Scalable Dragonfly TopologyProceedings of the 35th Annual International Symposium on Computer Architecture10.1109/ISCA.2008.19(77-88)Online publication date: 21-Jun-2008
https://dl.acm.org/doi/10.1109/ISCA.2008.19
Shacham ABergman KCarloni L(2007)On the Design of a Photonic Network-on-ChipProceedings of the First International Symposium on Networks-on-Chip10.1109/NOCS.2007.35(53-64)Online publication date: 7-May-2007
https://dl.acm.org/doi/10.1109/NOCS.2007.35

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