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An Experimental Study of Soft Errors in Microprocessors

Published: 01 November 2005 Publication History

Abstract

The issue of soft errors is an important emerging concern in the design and implementation of future microprocessors.To date, in all but the most mission-critical applications, implementing parity and Error Correction Codes for caches and other large, regular SRAM structures has been sufficient to stem the growing soft error tide.However, this may not be the case for long, and questions remain as to efficient methods to detect and recover from soft errors - in particular errors in the less structured execution sections. In this work, we examine the impact of soft errors on two different microarchitectures: a simple 5-stage DLX processor and high-performance implementation of an Alpha processor.The results contrast impact of soft errors on combinational and sequential logic, identify the most vulnerable units, and assess the impact of soft errors on the application.

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G.P. Saggese et al., An Experimental Study of Transient Faults in Microprocessors, tech. report, Center for Reliable and High-Performance Computing, Univ. of Illinois, Urbana-Champaign, 2005.
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Cited By

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  • (2024)Versatile Datapath Soft Error Detection on the Cheap for HPC ApplicationsProceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis10.1109/SC41406.2024.00061(1-15)Online publication date: 17-Nov-2024
  • (2018)Evaluating and accelerating high-fidelity error injection for HPCProceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis10.5555/3291656.3291716(1-13)Online publication date: 11-Nov-2018
  • (2018)Characterizing the Impact of Soft Errors Affecting Floating-point ALUs using RTL-Ievel Fault InjectionProceedings of the 47th International Conference on Parallel Processing10.1145/3225058.3225089(1-10)Online publication date: 13-Aug-2018
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Published In

cover image IEEE Micro
IEEE Micro  Volume 25, Issue 6
November 2005
94 pages

Publisher

IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 01 November 2005

Author Tags

  1. Assessment and Protection Techniques
  2. Fault Injection
  3. Microprocessor Architecture
  4. Soft error sensitivity
  5. Soft errors

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View all
  • (2024)Versatile Datapath Soft Error Detection on the Cheap for HPC ApplicationsProceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis10.1109/SC41406.2024.00061(1-15)Online publication date: 17-Nov-2024
  • (2018)Evaluating and accelerating high-fidelity error injection for HPCProceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis10.5555/3291656.3291716(1-13)Online publication date: 11-Nov-2018
  • (2018)Characterizing the Impact of Soft Errors Affecting Floating-point ALUs using RTL-Ievel Fault InjectionProceedings of the 47th International Conference on Parallel Processing10.1145/3225058.3225089(1-10)Online publication date: 13-Aug-2018
  • (2018)Evaluating and accelerating high-fidelity error injection for HPCProceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis10.1109/SC.2018.00048(1-13)Online publication date: 11-Nov-2018
  • (2018)Understanding scale-dependent soft-error behavior of scientific applicationsProceedings of the 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing10.1109/CCGRID.2018.00075(482-491)Online publication date: 1-May-2018
  • (2018)Programming guidelines for improving software resiliency against soft-errors without performance overheadComputing10.1007/s00607-018-0592-y100:9(971-1003)Online publication date: 1-Sep-2018
  • (2017)Analyzing the criticality of transient faults-induced SDCS on GPU applicationsProceedings of the 8th Workshop on Latest Advances in Scalable Algorithms for Large-Scale Systems10.1145/3148226.3148228(1-7)Online publication date: 12-Nov-2017
  • (2017)Experimental and analytical study of Xeon Phi reliabilityProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.1145/3126908.3126960(1-12)Online publication date: 12-Nov-2017
  • (2017)CAROL-FIProceedings of the Computing Frontiers Conference10.1145/3075564.3075598(295-298)Online publication date: 15-May-2017
  • (2017)A Stage-Wise Soft-Error Detection Scheme for Flip-Flop Based Pipelines in Secure Cloud ServersJournal of Signal Processing Systems10.1007/s11265-016-1210-x89:1(61-72)Online publication date: 1-Oct-2017
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