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Probabilistic Distance-Based Arbitration: Providing Equality of Service for Many-Core CMPs

Published: 04 December 2010 Publication History

Abstract

Emerging many-core chip multiprocessors will integrate dozens of small processing cores with an on-chip interconnect consisting of point-to-point links. The interconnect enables the processing cores to not only communicate, but to share common resources such as main memory resources and I/O controllers. In this work, we propose an arbitration scheme to enable equality of service (EoS) in access to a chip’s shared resources. That is, we seek to remove any bias in a core’s access to a shared resource based on its location in the CMP. We propose using probabilistic arbitration combined with distance-based weights to achieve EoS and overcome the limitation of conventional round-robin arbiter. We describe how nonlinear weights need to be used with probabilistic arbiters and propose three different arbitration weight metrics – fixed weight, constantly increasing weight, and variably increasing weight. By only modifying the arbitration of an on-chip router, we do not require any additional buffers or virtual channels and create a simple, low-cost mechanism for achieving EoS. We evaluate our arbitration scheme across a wide range of traffic patterns. In addition to providing EoS, the proposed arbitration has additional benefits which include providing quality-of-service features (such as differentiated service) and providing fairness in terms of both throughput and latency that approaches the global fairness achieved with age-base arbitration – thus, providing a more stable network by achieving high sustained throughput beyond saturation.

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  • (2022)A software-defined tensor streaming multiprocessor for large-scale machine learningProceedings of the 49th Annual International Symposium on Computer Architecture10.1145/3470496.3527405(567-580)Online publication date: 18-Jun-2022
  • (2019)Impact of Network Fairness on the Performance of Parallel SystemsProceedings of the Australasian Computer Science Week Multiconference10.1145/3290688.3290706(1-10)Online publication date: 29-Jan-2019
  • (2017)History-Based Arbitration for Fairness in Processor-Interconnect of NUMA ServersACM SIGARCH Computer Architecture News10.1145/3093337.303775345:1(765-777)Online publication date: 4-Apr-2017
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        cover image ACM Conferences
        MICRO '43: Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
        December 2010
        542 pages
        ISBN:9780769542997

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        IEEE Computer Society

        United States

        Publication History

        Published: 04 December 2010

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        Author Tags

        1. age-based arbitration
        2. fairness
        3. on-chip network
        4. quality of service (QoS)

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        Overall Acceptance Rate 484 of 2,242 submissions, 22%

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        View all
        • (2022)A software-defined tensor streaming multiprocessor for large-scale machine learningProceedings of the 49th Annual International Symposium on Computer Architecture10.1145/3470496.3527405(567-580)Online publication date: 18-Jun-2022
        • (2019)Impact of Network Fairness on the Performance of Parallel SystemsProceedings of the Australasian Computer Science Week Multiconference10.1145/3290688.3290706(1-10)Online publication date: 29-Jan-2019
        • (2017)History-Based Arbitration for Fairness in Processor-Interconnect of NUMA ServersACM SIGARCH Computer Architecture News10.1145/3093337.303775345:1(765-777)Online publication date: 4-Apr-2017
        • (2017)History-Based Arbitration for Fairness in Processor-Interconnect of NUMA ServersACM SIGPLAN Notices10.1145/3093336.303775352:4(765-777)Online publication date: 4-Apr-2017
        • (2017)History-Based Arbitration for Fairness in Processor-Interconnect of NUMA ServersProceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3037697.3037753(765-777)Online publication date: 4-Apr-2017
        • (2016)Resource Sharing Centric Dynamic Voltage and Frequency Scaling for CMP Cores, Uncore, and MemoryACM Transactions on Design Automation of Electronic Systems10.1145/289739421:4(1-25)Online publication date: 27-May-2016
        • (2016)Towards High-Performance Bufferless NoCs with SCEPTERIEEE Computer Architecture Letters10.1109/LCA.2015.242869915:1(62-65)Online publication date: 1-Jan-2016
        • (2014)Unifying on-chip and inter-node switching within the Anton 2 networkProceeding of the 41st annual international symposium on Computer architecuture10.5555/2665671.2665677(1-12)Online publication date: 14-Jun-2014
        • (2014)Unifying on-chip and inter-node switching within the Anton 2 networkACM SIGARCH Computer Architecture News10.1145/2678373.266567742:3(1-12)Online publication date: 14-Jun-2014
        • (2014)NoC Architectures for Silicon Interposer SystemsProceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2014.61(458-470)Online publication date: 13-Dec-2014
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