research-article

Read operation performance of large selectorless cross-point array with self-rectifying memristive device

Authors:

Said F. Al-Sarawi,

Damith C. Ranasinghe,

Derek AbbottAuthors Info & Claims

Integration, the VLSI Journal, Volume 54, Issue C

Pages 56 - 64

https://doi.org/10.1016/j.vlsi.2016.02.002

Published: 01 June 2016 Publication History

Abstract

Memristive device based passive crossbar arrays hold a great promise for high-density and non-volatile memories. A significant challenge of ultra-high density integration of these crossbars is unwanted sneak-path currents. The most common way of addressing this issue today is an integrated or external selecting device to block unwanted current paths. In this paper, we use a memristive device with intrinsic rectifying behavior to suppress sneak-path currents in the crossbar. We systematically evaluate the read operation performance of large-scale crossbar arrays with regard to read margin and power consumption for different crossbar sizes, nanowire interconnect resistances, ON and OFF resistances, rectification ratios under different read-schemes. Outcomes of this study allow improved understanding of the trade-off between read margin, power consumption and read-schemes. Most importantly, this study provides a guideline for circuit designers to improve the performance of oxide-based resistive memory (RRAM) based cross-point arrays. Overall, self-rectifying behavior of the memristive device efficiently improves the read operation performance of large-scale selectorless cross-point arrays. HighlightsProvide a Verilog-A behavioral model of a memristive device with intrinsic rectifying behavior based on published measured characteristics of these devices.Evaluate read operation performance under diverse settings.Demonstrate the effectiveness of this special type of memristive device as an alternative to reduce sneak-path currents in the crossbar.Performs a valuable crossbar read operation comparison among memristive device with intrinsic-rectifying behavior, memristive device with linear I-V characteristic and 1S1M structure.

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Cited By

Wang CFeng DTong WLiu JLi ZChang JZhang YWu BXu JZhao WLi YRen R(2019)Cross-point Resistive MemoryACM Transactions on Design Automation of Electronic Systems10.1145/332506724:4(1-37)Online publication date: 20-Jun-2019
https://dl.acm.org/doi/10.1145/3325067
Wu BFeng DTong WLiu JLi SYang MWang CZhang Y(2018)Aliens: A Novel Hybrid Architecture for Resistive Random-Access Memory2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1145/3240765.3240776(1-8)Online publication date: 5-Nov-2018
https://dl.acm.org/doi/10.1145/3240765.3240776

Read operation performance of large selectorless cross-point array with self-rectifying memristive device
1. Hardware
  1. Integrated circuits

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Published In

cover image Integration, the VLSI Journal

Integration, the VLSI Journal Volume 54, Issue C

June 2016

118 pages

ISSN:0167-9260

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Copyright © Elsevier B.V.

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Elsevier Science Publishers B. V.

Netherlands

Publication History

Published: 01 June 2016

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Cited By

Wang CFeng DTong WLiu JLi ZChang JZhang YWu BXu JZhao WLi YRen R(2019)Cross-point Resistive MemoryACM Transactions on Design Automation of Electronic Systems10.1145/332506724:4(1-37)Online publication date: 20-Jun-2019
https://dl.acm.org/doi/10.1145/3325067
Wu BFeng DTong WLiu JLi SYang MWang CZhang Y(2018)Aliens: A Novel Hybrid Architecture for Resistive Random-Access Memory2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1145/3240765.3240776(1-8)Online publication date: 5-Nov-2018
https://dl.acm.org/doi/10.1145/3240765.3240776

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