article

3-D analytical modeling of high-k gate stack dual-material tri-gate strained silicon-on-nothing MOSFET with dual-material bottom gate for suppressing short channel effects

Authors:

Pritha Banerjee,

Subir Kumar SarkarAuthors Info & Claims

Journal of Computational Electronics, Volume 16, Issue 3

Pages 631 - 639

https://doi.org/10.1007/s10825-017-1002-y

Published: 01 September 2017 Publication History

Abstract

This paper presents a detailed study of the response of a new structure namely, high-k gate stack dual-material tri-gate strained silicon-on-nothing MOSFET with dual material bottom gate, towards various short channel effects, namely, drain-induced barrier lowering, threshold voltage roll-off, hot carrier effect and subthreshold swing. Based on the 3-D Poisson's equation, the surface potential of the device is calculated along with its threshold voltage and electric field. The impact on the device performance due to the variation of different device parameters is also studied. The analytical results are verified using the simulated results obtained from ATLAS, a 3-D device simulator from SILVACO.

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Cited By

Ahangari Z(2020)Design and performance optimization of thin film tin monoxide (SnO)/silicon electron–hole bilayer tunnel field-effect transistorJournal of Computational Electronics10.1007/s10825-020-01574-719:4(1485-1493)Online publication date: 27-Aug-2020
https://dl.acm.org/doi/10.1007/s10825-020-01574-7

3-D analytical modeling of high-k gate stack dual-material tri-gate strained silicon-on-nothing MOSFET with dual-material bottom gate for suppressing short channel effects

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Published In

cover image Journal of Computational Electronics

Journal of Computational Electronics Volume 16, Issue 3

September 2017

508 pages

ISSN:1569-8025

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Copyright © Copyright © 2017 Springer Science+Business Media, LLC.

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Springer-Verlag

Berlin, Heidelberg

Publication History

Published: 01 September 2017

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Cited By

Ahangari Z(2020)Design and performance optimization of thin film tin monoxide (SnO)/silicon electron–hole bilayer tunnel field-effect transistorJournal of Computational Electronics10.1007/s10825-020-01574-719:4(1485-1493)Online publication date: 27-Aug-2020
https://dl.acm.org/doi/10.1007/s10825-020-01574-7

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