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An Energy- and Area-Efficient Approximate Ternary Adder Based on CNTFET Switching Logic

Published: 01 May 2018 Publication History

Abstract

Nowadays, portable multimedia devices have been widely used in low-power structures. Additionally, using approximate computing and multiple-valued logic (MVL) can lead to lower power consumption. Carbon nanotube field effect transistor (CNTFET), with a determinable threshold voltage, is an appropriate choice for designing MVL circuits. In this study, a new approximate ternary full adder is presented based on CNTFET switching logic with the aim of reducing area and energy consumption. The results obtained by the Synopsys HSPICE simulator with the Stanford 32 nm CNTFET technology show that the average power consumption, delay, and energy consumption of the proposed designs are significantly lower than the other conventional and state-of-the-art CNTFET-based ternary circuits. In addition, the proposed ternary full adder is applied to reduce the steps of a ternary multiplier structure and some important metrics such as normalized error distance and energy-error trade-off are calculated to evaluate the efficiency of the proposed circuits. The layout of the proposed design is also plotted to estimate area consumption. Moreover, the approximate design is used for image processing applications such as image multiplying and image blending and the results are accordingly compared with the exact outputs. Similarly, the evaluated peak signal-to-noise ratio and mean structural similarity index metric indicate that the proposed approximate full adder has a proper accuracy for image processing applications.

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  • (2024)Energy-Efficient Exact and Approximate CNTFET-Based Ternary Full AddersCircuits, Systems, and Signal Processing10.1007/s00034-023-02589-843:5(2982-3003)Online publication date: 1-May-2024
  • (2024)Efficient ATFA design based on CNTFET technology for error–tolerant applicationsCircuits, Systems, and Signal Processing10.1007/s00034-023-02506-z43:2(1119-1143)Online publication date: 1-Feb-2024
  • (2023)Design of CNTFET-Based Ternary and Quaternary Magnitude ComparatorCircuits, Systems, and Signal Processing10.1007/s00034-023-02380-942:9(5634-5662)Online publication date: 3-May-2023
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  1. An Energy- and Area-Efficient Approximate Ternary Adder Based on CNTFET Switching Logic

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    Published In

    cover image Circuits, Systems, and Signal Processing
    Circuits, Systems, and Signal Processing  Volume 37, Issue 5
    May 2018
    437 pages

    Publisher

    Birkhauser Boston Inc.

    United States

    Publication History

    Published: 01 May 2018

    Author Tags

    1. Approximate computing
    2. Carbon nanotube field effect transistor
    3. Multiple-valued logic
    4. Nanotechnology
    5. Switching logic
    6. Ternary logic

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    View all
    • (2024)Energy-Efficient Exact and Approximate CNTFET-Based Ternary Full AddersCircuits, Systems, and Signal Processing10.1007/s00034-023-02589-843:5(2982-3003)Online publication date: 1-May-2024
    • (2024)Efficient ATFA design based on CNTFET technology for error–tolerant applicationsCircuits, Systems, and Signal Processing10.1007/s00034-023-02506-z43:2(1119-1143)Online publication date: 1-Feb-2024
    • (2023)Design of CNTFET-Based Ternary and Quaternary Magnitude ComparatorCircuits, Systems, and Signal Processing10.1007/s00034-023-02380-942:9(5634-5662)Online publication date: 3-May-2023
    • (2022)A novel expeditious switching circuit design for non volatile combinational circuitAnalog Integrated Circuits and Signal Processing10.1007/s10470-022-02086-z113:3(331-342)Online publication date: 1-Dec-2022

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