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System-level exploration for pareto-optimal configurations in parameterized systems-on-a-chip

Published: 04 November 2001 Publication History

Abstract

In this work, we provide a technique for efficiently exploring the configuration space of a parameterized system-on-a-chip (SOC) architecture to find all Pareto-optimal configurations. These configurations represent the range of meaningful power and performance tradeoffs that are obtainable by adjusting parameter values for a fixed application mapped onto the SOC architecture. Our approach extensively prunes the potentially large configuration space by taking advantage of parameter dependencies. We have successfully incorporated our technique into the parameterized SOC tuning environment (Platune) and applied it to a number of applications.

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Cited By

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  • (2015)Four Metrics to Evaluate Heterogeneous MulticoresACM Transactions on Architecture and Code Optimization10.1145/282995012:4(1-25)Online publication date: 16-Nov-2015
  • (2014)Fast Design Exploration for Performance, Power and Accuracy Tradeoffs in FPGA-Based AcceleratorsACM Transactions on Reconfigurable Technology and Systems10.1145/25676617:1(1-22)Online publication date: 1-Feb-2014
  • (2014)A comparative evaluation of multi-objective exploration algorithms for high-level designACM Transactions on Design Automation of Electronic Systems10.1145/256666919:2(1-22)Online publication date: 28-Mar-2014
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  1. System-level exploration for pareto-optimal configurations in parameterized systems-on-a-chip

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          cover image ACM Conferences
          ICCAD '01: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
          November 2001
          656 pages
          ISBN:0780372492
          • Conference Chair:
          • Rolf Ernst

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          IEEE Press

          Publication History

          Published: 04 November 2001

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          Author Tags

          1. configurable platforms
          2. embedded systems
          3. low-power system design
          4. parameterized architectures
          5. platform tuning
          6. system-level exploration
          7. system-on-a-chip

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          ICCAD01
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          ICCAD01: International Conference on Computer Aided Design
          November 4 - 8, 2001
          California, San Jose

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          Overall Acceptance Rate 457 of 1,762 submissions, 26%

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          Cited By

          View all
          • (2015)Four Metrics to Evaluate Heterogeneous MulticoresACM Transactions on Architecture and Code Optimization10.1145/282995012:4(1-25)Online publication date: 16-Nov-2015
          • (2014)Fast Design Exploration for Performance, Power and Accuracy Tradeoffs in FPGA-Based AcceleratorsACM Transactions on Reconfigurable Technology and Systems10.1145/25676617:1(1-22)Online publication date: 1-Feb-2014
          • (2014)A comparative evaluation of multi-objective exploration algorithms for high-level designACM Transactions on Design Automation of Electronic Systems10.1145/256666919:2(1-22)Online publication date: 28-Mar-2014
          • (2013)Improving simulation speed and accuracy for many-core embedded platforms with ensemble modelsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485452(671-676)Online publication date: 18-Mar-2013
          • (2012)An exploration methodology for a customizable OpenCL stereo-matching application targeted to an industrial multi-cluster architectureProceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/2380445.2380523(503-512)Online publication date: 7-Oct-2012
          • (2009)Combined system synthesis and communication architecture exploration for MPSoCsProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874737(472-477)Online publication date: 20-Apr-2009
          • (2008)Multi-granularity sampling for simulating concurrent heterogeneous applicationsProceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems10.1145/1450095.1450127(217-226)Online publication date: 19-Oct-2008
          • (2007)Three-dimensional multiprocessor system-on-chip thermal optimizationProceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis10.1145/1289816.1289846(117-122)Online publication date: 30-Sep-2007
          • (2006)Dynamic data type refinement methodology for systematic performance-energy design exploration of network applicationsProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131692(740-745)Online publication date: 6-Mar-2006
          • (2006)Application-specific customization of parameterized FPGA soft-core processorsProceedings of the 2006 IEEE/ACM international conference on Computer-aided design10.1145/1233501.1233553(261-268)Online publication date: 5-Nov-2006
          • Show More Cited By

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