Article

Dynamic Power Management for Microprocessors: A Case Study

Authors:

Ricardo GonzalezAuthors Info & Claims

VLSID '97: Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications

Page 185

Published: 04 January 1997 Publication History

Abstract

Dynamic power management is one of the most popular and successful low power design techniques in commercial integrated circuits, especially microprocessors. However, despite its significance, relatively little has been published about it. The purpose of this paper is to provide an open discussion of the application of dynamic power management for a real microprocessor. TORCH, a statically scheduled superscalar microprocessor, is chosen for this purpose. We describe several techniques that we classify as dynamic power management-techniques aimed at reducing the power wasted in unnecessary circuit activity in the design. Some of the techniques have been used before for low power designs. Some others are new and it is demonstrated that significant power savings are achieved with these as well. We provide design details to illustrate the application of instances of all dynamic power management techniques for TORCH. Using a combination of techniques, the power consumption is reduced by about 23%. We hope that this study would lead to a wider recognition of dynamic power management as a very effective and practical power reduction technique.

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Shih WYou YHuang CLee J(2014)Compiler Optimization for Reducing Leakage Power in Multithread BSP ProgramsACM Transactions on Design Automation of Electronic Systems10.1145/266811920:1(1-34)Online publication date: 18-Nov-2014
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Huang JCheng HHwang YBrandner FAa T(2013)Power devilProceedings of the 10th Workshop on Optimizations for DSP and Embedded Systems10.1145/2443608.2443615(29-34)Online publication date: 24-Feb-2013
https://dl.acm.org/doi/10.1145/2443608.2443615
Druml NSteger CWeiss RGenser AHaid JRosenstiel WMacii E(2012)Estimation based power and supply voltage management for future RF-powered multi-core smart cardsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2492708.2492800(358-363)Online publication date: 12-Mar-2012
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Published In

cover image Guide Proceedings

VLSID '97: Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications

January 1997

ISBN:0818677554

Copyright © Copyright (c) 1997 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.

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IEEE Computer Society

United States

Publication History

Published: 04 January 1997

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Cited By

Shih WYou YHuang CLee J(2014)Compiler Optimization for Reducing Leakage Power in Multithread BSP ProgramsACM Transactions on Design Automation of Electronic Systems10.1145/266811920:1(1-34)Online publication date: 18-Nov-2014
https://dl.acm.org/doi/10.1145/2668119
Huang JCheng HHwang YBrandner FAa T(2013)Power devilProceedings of the 10th Workshop on Optimizations for DSP and Embedded Systems10.1145/2443608.2443615(29-34)Online publication date: 24-Feb-2013
https://dl.acm.org/doi/10.1145/2443608.2443615
Druml NSteger CWeiss RGenser AHaid JRosenstiel WMacii E(2012)Estimation based power and supply voltage management for future RF-powered multi-core smart cardsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2492708.2492800(358-363)Online publication date: 12-Mar-2012
https://dl.acm.org/doi/10.5555/2492708.2492800
You YHuang CLee J(2007)Compilation for compact power-gating controlsACM Transactions on Design Automation of Electronic Systems10.1145/1278349.127836412:4(51-es)Online publication date: 1-Sep-2007
https://dl.acm.org/doi/10.1145/1278349.1278364
You YLee CLee J(2006)Compilers for leakage power reductionACM Transactions on Design Automation of Electronic Systems10.1145/1124713.112472311:1(147-164)Online publication date: 1-Jan-2006
https://dl.acm.org/doi/10.1145/1124713.1124723
You YHuang CLee JWolf W(2005)A sink-n-hoist framework for leakage power reductionProceedings of the 5th ACM international conference on Embedded software10.1145/1086228.1086252(124-133)Online publication date: 18-Sep-2005
https://dl.acm.org/doi/10.1145/1086228.1086252
You YLee CLee J(2002)Compiler analysis and supports for leakage power reduction on microprocessorsProceedings of the 15th international conference on Languages and Compilers for Parallel Computing10.1007/11596110_4(45-60)Online publication date: 25-Jul-2002
https://dl.acm.org/doi/10.1007/11596110_4
Li FHe LSapatnekar SWiesel M(2001)Maximum current estimation considering power gatingProceedings of the 2001 international symposium on Physical design10.1145/369691.369748(106-111)Online publication date: 1-Apr-2001
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Butts JSohi GWolfe ASchlansker M(2000)A static power model for architectsProceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture10.1145/360128.360148(191-201)Online publication date: 1-Dec-2000
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Strollo ANapoli EDe Caro D(2000)New clock-gating techniques for low-power flip-flopsProceedings of the 2000 international symposium on Low power electronics and design10.1145/344166.344540(114-119)Online publication date: 1-Aug-2000
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