Article

Estimation of Inductive and Resistive Switching Noise on Power Supply Network in Deep Sub-Micron CMOS Circuits

ICCD '00: Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors

Page 65

Published: 17 September 2000 Publication History

Abstract

In this paper, we propose an event-driven simulation based approach to estimate the worst case IR drop and Ldi/dt inductive noise on the power supply network. The switching noise is modeled as a weighted sum of the switching currents and the rates of change of the switching currents, where the weights are respectively the effective resistance and inductance (on the P/G network) experienced by each switching current. Monte Carlo and Genetic Algorithm are employed to search for the worst-case input vector pair(s) that induces the maximum switching noise. The worst-case input patterns are used in the SPICE simulation to verify the switching noise waveforms on the power supply network. Experimental results show that the worst case switching noise on the power supply network for ISCAS85 benchmark circuits implemented in TSMC 0:25µm technology can be as high as 40% of the supply voltage Vdd.

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Cited By

Mitra PBhaumik J(2019)A CAD approach for suppression of power supply noise and performance analysis of some multi-core processors in pre-layout stageMicrosystem Technologies10.1007/s00542-018-4043-725:5(1977-1986)Online publication date: 1-May-2019
https://dl.acm.org/doi/10.1007/s00542-018-4043-7
Shen WCai YHong XHu JLu B(2008)Zero skew clock routing in X-architecture based on an improved greedy matching algorithmIntegration, the VLSI Journal10.1016/j.vlsi.2007.10.00441:3(426-438)Online publication date: 1-May-2008
https://dl.acm.org/doi/10.1016/j.vlsi.2007.10.004
Lu YSze CHong XZhou QCai YHuang LHu JTang T(2005)Register placement for low power clock networkProceedings of the 2005 Asia and South Pacific Design Automation Conference10.1145/1120725.1120971(588-593)Online publication date: 18-Jan-2005
https://dl.acm.org/doi/10.1145/1120725.1120971
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Estimation of Inductive and Resistive Switching Noise on Power Supply Network in Deep Sub-Micron CMOS Circuits
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cover image Guide Proceedings

ICCD '00: Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors

September 2000

ISBN:0769508014

Copyright © Copyright (c) 2000 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.

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IEEE Computer Society

United States

Publication History

Published: 17 September 2000

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Cited By

Mitra PBhaumik J(2019)A CAD approach for suppression of power supply noise and performance analysis of some multi-core processors in pre-layout stageMicrosystem Technologies10.1007/s00542-018-4043-725:5(1977-1986)Online publication date: 1-May-2019
https://dl.acm.org/doi/10.1007/s00542-018-4043-7
Shen WCai YHong XHu JLu B(2008)Zero skew clock routing in X-architecture based on an improved greedy matching algorithmIntegration, the VLSI Journal10.1016/j.vlsi.2007.10.00441:3(426-438)Online publication date: 1-May-2008
https://dl.acm.org/doi/10.1016/j.vlsi.2007.10.004
Lu YSze CHong XZhou QCai YHuang LHu JTang T(2005)Register placement for low power clock networkProceedings of the 2005 Asia and South Pacific Design Automation Conference10.1145/1120725.1120971(588-593)Online publication date: 18-Jan-2005
https://dl.acm.org/doi/10.1145/1120725.1120971
Lu YSze CHong XZhou QCai YHuang LHu JJoyner WMartin GKahng A(2005)Navigating registers in placement for clock network minimizationProceedings of the 42nd annual Design Automation Conference10.1145/1065579.1065628(176-181)Online publication date: 13-Jun-2005
https://dl.acm.org/doi/10.1145/1065579.1065628
Zhao Soy KKoh C(2002)Power Supply Noise Aware Floorplanning and Decoupling Capacitance PlacementProceedings of the 2002 Asia and South Pacific Design Automation Conference10.5555/832284.835431Online publication date: 7-Jan-2002
https://dl.acm.org/doi/10.5555/832284.835431
Zhao SRoy KKoh CSapatnekar SWiesel M(2001)Decoupling capacitance allocation for power supply noise suppressionProceedings of the 2001 international symposium on Physical design10.1145/369691.369737(66-71)Online publication date: 1-Apr-2001
https://dl.acm.org/doi/10.1145/369691.369737
Zhao SRoy KKoh CSentovich E(2000)Frequency domain analysis of switching noise on power supply networkProceedings of the 2000 IEEE/ACM international conference on Computer-aided design10.5555/602902.603012(487-492)Online publication date: 5-Nov-2000
https://dl.acm.org/doi/10.5555/602902.603012

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