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A read-write aware replacement policy for phase change memory

Published: 26 September 2011 Publication History

Abstract

Scaling DRAM will be increasingly difficult due to power and cost constraint. Phase Change Memory (PCM) is an emerging memory technology that can increase main memory capacity in a cost-effective and power-efficient manner. However, PCM incurs relatively long latency, high write energy, and finite endurance. To make PCM an alternative for scalable main memory, write traffic to PCM should be reduced, where memory replacement policy could play a vital role.
In this paper, we propose a Read-Write Aware policy (RWA) to reduce write traffic without performance degradation. RWA explores the asymmetry of read and write costs of PCM, and prevents dirty data lines from frequent evictions. Simulations results on an 8-core CMP show that for memory organization with and without DRAM buffer, RWA can achieve 33.1% and 14.2% reduction in write traffic to PCM respectively. In addition, an Improved RWA (I-RWA) is proposed that takes into consideration the write access pattern and can further improve memory efficiency. For organization with DRAM buffer, I-RWA provides a significant 42.8% reduction in write traffic. Furthermore, both RWA and I-RWA incurs no hardware overhead and can be easily integrated into existing hardware.

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Cited By

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  • (2020)Reuse Distance-based Victim Cache for Effective Utilisation of Hybrid Main Memory SystemACM Transactions on Design Automation of Electronic Systems10.1145/338073225:3(1-32)Online publication date: 28-Feb-2020
  • (2018)Write Energy Reduction for PCM via Pumping Efficiency ImprovementACM Transactions on Storage10.1145/320013914:3(1-21)Online publication date: 26-Nov-2018
  • (2016)Write-back aware shared last-level cache management for hybrid main memoryProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2898110(1-6)Online publication date: 5-Jun-2016
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  1. A read-write aware replacement policy for phase change memory

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    Published In

    cover image Guide Proceedings
    APPT'11: Proceedings of the 9th international conference on Advanced parallel processing technologies
    September 2011
    185 pages
    ISBN:9783642241505
    • Editors:
    • Olivier Temam,
    • Pen-Chung Yew,
    • Binyu Zang

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    Springer-Verlag

    Berlin, Heidelberg

    Publication History

    Published: 26 September 2011

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    View all
    • (2020)Reuse Distance-based Victim Cache for Effective Utilisation of Hybrid Main Memory SystemACM Transactions on Design Automation of Electronic Systems10.1145/338073225:3(1-32)Online publication date: 28-Feb-2020
    • (2018)Write Energy Reduction for PCM via Pumping Efficiency ImprovementACM Transactions on Storage10.1145/320013914:3(1-21)Online publication date: 26-Nov-2018
    • (2016)Write-back aware shared last-level cache management for hybrid main memoryProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2898110(1-6)Online publication date: 5-Jun-2016
    • (2015)A Light-Weighted Software-Controlled Cache for PCM-based Main Memory SystemsProceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840823(22-29)Online publication date: 2-Nov-2015

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