Cited By
View all- Cong JGupta PLee J(2010)Evaluating statistical power optimizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2010.206139029:11(1750-1762)Online publication date: 1-Nov-2010
On the futility of statistical power optimization
Authors: 
Jason Cong, 
Puneet Gupta, John LeeAuthors Info & Claims
Pages 167 - 172
Abstract
In response to the increasing variations in integrated-circuit manufacturing, the current trend is to create designs that take these variations into account statistically. In this paper we try to quantify the difference between the statistical and deterministic optima of leakage power while making no assumptions about the delay model. We develop a framework for deriving a theoretical upper-bound on the suboptimality that is incurred by using the deterministic optimum as an approximation for the statistical optimum. On average, the bound is 2.4% for a suite of benchmark circuits in a 45nm technology. We further give an intuitive explanation and show, by using solution rank orders, that the practical suboptimality gap is much lower. Therefore, the need for statistical power modeling for the purpose of optimization is questionable.
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Published: 19 January 2009
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View all- Cong JGupta PLee J(2010)Evaluating statistical power optimizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2010.206139029:11(1750-1762)Online publication date: 1-Nov-2010
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