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An economical solution to the cache coherence problem

Authors:

James Archibald,

Jean Loup BaerAuthors Info & Claims

ISCA '84: Proceedings of the 11th annual international symposium on Computer architecture

Pages 355 - 362

https://doi.org/10.1145/800015.808205

Published: 01 January 1984 Publication History

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Abstract

In this paper we review and qualitatively evaluate schemes to maintain cache coherence in tightly-coupled multiprocessor systems. This leads us to propose a more economical (hardware-wise), expandable and modular variation of the “global directory” approach. Protocols for this solution are described. Performance evaluation studies indicate the limits (number of processors, level of sharing) within which this approach is viable.

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Cited By

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Chacon GWilliams CKnechtel JSinanoglu OGratz PSoteriou V(2023)Coherence Attacks and Countermeasures in Interposer-based Chiplet SystemsACM Transactions on Architecture and Code Optimization10.1145/363346121:2(1-25)Online publication date: 20-Nov-2023
https://dl.acm.org/doi/10.1145/3633461
Nagarajan VSorin DHill MWood DNagarajan VSorin DHill MWood D(2022)Directory Coherence ProtocolsA Primer on Memory Consistency and Cache Coherence10.1007/978-3-031-01764-3_8(151-190)Online publication date: 28-Mar-2022
https://doi.org/10.1007/978-3-031-01764-3_8
Sorin DHill MWood DSorin DHill MWood D(2022)Directory Coherence ProtocolsA Primer on Memory Consistency and Cache Coherence10.1007/978-3-031-01733-9_8(139-176)Online publication date: 18-Oct-2022
https://doi.org/10.1007/978-3-031-01733-9_8
Show More Cited By

Index Terms

An economical solution to the cache coherence problem
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Multiple instruction, multiple data
2. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory

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Published In

ISCA '84: Proceedings of the 11th annual international symposium on Computer architecture

January 1984

373 pages

ISBN:0818605383

DOI:10.1145/800015

Chairman:
Dharma P. Agrawal

ACM SIGARCH Computer Architecture News Volume 12, Issue 3
June 1984
348 pages
ISSN:0163-5964
DOI:10.1145/773453
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Association for Computing Machinery

New York, NY, United States

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Published: 01 January 1984

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Chacon GWilliams CKnechtel JSinanoglu OGratz PSoteriou V(2023)Coherence Attacks and Countermeasures in Interposer-based Chiplet SystemsACM Transactions on Architecture and Code Optimization10.1145/363346121:2(1-25)Online publication date: 20-Nov-2023
https://dl.acm.org/doi/10.1145/3633461
Nagarajan VSorin DHill MWood DNagarajan VSorin DHill MWood D(2022)Directory Coherence ProtocolsA Primer on Memory Consistency and Cache Coherence10.1007/978-3-031-01764-3_8(151-190)Online publication date: 28-Mar-2022
https://doi.org/10.1007/978-3-031-01764-3_8
Sorin DHill MWood DSorin DHill MWood D(2022)Directory Coherence ProtocolsA Primer on Memory Consistency and Cache Coherence10.1007/978-3-031-01733-9_8(139-176)Online publication date: 18-Oct-2022
https://doi.org/10.1007/978-3-031-01733-9_8
Nagarajan VSorin DHill MWood D(2020)A Primer on Memory Consistency and Cache Coherence, Second EditionSynthesis Lectures on Computer Architecture10.2200/S00962ED2V01Y201910CAC04915:1(1-294)Online publication date: 4-Feb-2020
https://doi.org/10.2200/S00962ED2V01Y201910CAC049
Chaudhry GHan W(2016)A New Scheme For Cache Coherence In Multiprocessor SystemsInternational Journal of Modelling and Simulation10.1080/02286203.1995.1176026615:4(148-153)Online publication date: Sep-2016
https://doi.org/10.1080/02286203.1995.11760266
Jaeger JCarribault PPérache M(2015)Fine-grain data management directory for OpenMP 4.0 and OpenACCConcurrency and Computation: Practice & Experience10.1002/cpe.335227:6(1528-1539)Online publication date: 25-Apr-2015
https://dl.acm.org/doi/10.1002/cpe.3352
Power JBasu AGu JPuthoor SBeckmann BHill MReinhardt SWood DFarrens MKozyrakis C(2013)Heterogeneous system coherence for integrated CPU-GPU systemsProceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/2540708.2540747(457-467)Online publication date: 7-Dec-2013
https://dl.acm.org/doi/10.1145/2540708.2540747
Sorin DHill MWood D(2011)A Primer on Memory Consistency and Cache CoherenceSynthesis Lectures on Computer Architecture10.2200/S00346ED1V01Y201104CAC0166:3(1-212)Online publication date: 30-Nov-2011
https://doi.org/10.2200/S00346ED1V01Y201104CAC016
Attiya HGramoli VMilani A(2010)A provably starvation-free distributed directory protocolProceedings of the 12th international conference on Stabilization, safety, and security of distributed systems10.5555/1926829.1926864(405-419)Online publication date: 20-Sep-2010
https://dl.acm.org/doi/10.5555/1926829.1926864
Jerger NDe Micheli GAl-Hashimi BMueller WMacii E(2010)SigNetProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871260(1378-1383)Online publication date: 8-Mar-2010
https://dl.acm.org/doi/10.5555/1870926.1871260
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Abstract

References

Cited By

Index Terms

Recommendations

Maintaining Cache Coherence through Compiler-Directed Data Prefetching

Improving cache performance with adaptive cache topologies and deferred coherence models

Efficient Integration of Compiler-Directed Cache Coherence and Data Prefetching

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