Cache coherence protocols: evaluation using a multiprocessor simulation model

Reviewer: Donald Mark Chiarulli

Cache coherence is the problem of maintaining consistency among multiple copies of cache memory in a shared-memory multiprocessor. By collecting and surveying the extensive current research in cache coherence protocols, this paper becomes significant in its introductory sections. Archibald and Baer present detailed descriptions of the write-once, Synapse, Berkeley RISC multiprocessor, Illinois, DEC Firefly, and Xerox Dragon solutions. To provide an objective evaluation of these protocols, a simulation was run to compare the level at which bus saturation occurred in each. The simulation assumes a single bus architecture and is run for a reasonable range of workload parameters. The results from four representative cases are presented. The authors confirm the intuitive notion that efficient handling of private block references is a cornerstone of performance. Yet they are also unable to show any major differences in the handling of private block writes between the four best performing protocols. As sharing is increased, the distributed-write-based protocols, specifically Dragon and Firefly, are the best performers. The authors go on to state that the Berkeley protocol actually outperforms the others at high levels of sharing, but no experimental results are presented to verify this statement. The authors suggest further research to develop additional protocols of superior performance. This reviewer concurs. Based on current commercial offerings, it is apparent that this architecture, for better or worse, will be with us for a while.