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Subanosecond pixel rendering with million transistor chips

Authors:

Nader Gharachorloo,

Satish Gupta,

Erden Hokenek,

Peruvemba Balasubramanian,

Bill Bogholtz,

Christian Mathieu,

Christos ZoulasAuthors Info & Claims

SIGGRAPH '88: Proceedings of the 15th annual conference on Computer graphics and interactive techniques

Pages 41 - 49

https://doi.org/10.1145/54852.378474

Published: 01 June 1988 Publication History

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Abstract

The desire for higher performance and higher resolution continuously increases the pixel update rates needed in high performance graphics systems. The increasing density of memory chips on the other hand reduces the pixel update rate that can be provided by the frame buffer. We present the design of a VLSI chip and a graphics system that can sustain sub-nanosecond pixel rendering rates for three-dimensional polygons and can be used to render about a million Z-Buffered and Gourard shaded polygons per second. The chip has been designed at the IBM Research Division's Thomas J. Watson Research Center.

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Cited By

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Chiueh TKaufman AStraßer WMolnar SSchneider B(1997)HeresyProceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware10.1145/258694.258719(69-77)Online publication date: 3-Aug-1997
https://dl.acm.org/doi/10.1145/258694.258719
Ikedo TJianhua Ma (1997)An advanced graphics chip with bump-mapped Phong shadingProceedings Computer Graphics International10.1109/CGI.1997.601297(156-165)Online publication date: 1997
https://doi.org/10.1109/CGI.1997.601297
Deering MSchlapp SLavelle MSchweitzer DGlassner AKeeler M(1994)FBRAMProceedings of the 21st annual conference on Computer graphics and interactive techniques10.1145/192161.192194(167-174)Online publication date: 24-Jul-1994
https://dl.acm.org/doi/10.1145/192161.192194
Show More Cited By

Index Terms

Subanosecond pixel rendering with million transistor chips
1. Computing methodologies
  1. Computer graphics
    1. Image manipulation
    2. Rendering
2. Hardware
  1. Very large scale integration design
    1. VLSI system specification and constraints

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Information & Contributors

Information

Published In

SIGGRAPH '88: Proceedings of the 15th annual conference on Computer graphics and interactive techniques

August 1988

356 pages

ISBN:0897912756

DOI:10.1145/54852

Editor:
Richard J. Beach
Xerox PARC, Palo Alto, CA

ACM SIGGRAPH Computer Graphics Volume 22, Issue 4
Aug. 1988
330 pages
ISSN:0097-8930
DOI:10.1145/378456
Editor:
Richard J. Beach
Xerox PARC, Palo Alto, CA
Issue’s Table of Contents

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 June 1988

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SIGGRAPH88: 15th Annual conference on Computer Graphics

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SIGGRAPH '88 Paper Acceptance Rate 34 of 161 submissions, 21%;

Overall Acceptance Rate 1,822 of 8,601 submissions, 21%

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Cited By

View all

Chiueh TKaufman AStraßer WMolnar SSchneider B(1997)HeresyProceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware10.1145/258694.258719(69-77)Online publication date: 3-Aug-1997
https://dl.acm.org/doi/10.1145/258694.258719
Ikedo TJianhua Ma (1997)An advanced graphics chip with bump-mapped Phong shadingProceedings Computer Graphics International10.1109/CGI.1997.601297(156-165)Online publication date: 1997
https://doi.org/10.1109/CGI.1997.601297
Deering MSchlapp SLavelle MSchweitzer DGlassner AKeeler M(1994)FBRAMProceedings of the 21st annual conference on Computer graphics and interactive techniques10.1145/192161.192194(167-174)Online publication date: 24-Jul-1994
https://dl.acm.org/doi/10.1145/192161.192194
Jayasinghe JEl-Hadidy FKaragiannis GHerrmann OSmit J(1991)Two-level pipelined systolic array graphics engineIEEE Journal of Solid-State Circuits10.1109/4.7500026:3(229-236)Online publication date: Mar-1991
https://doi.org/10.1109/4.75000
Gupta R(1991)PS: Polygon Streams A Distributed Architecture for Incremental Computation Applied to GraphicsAdvances in Computer Graphics Hardware IV10.1007/978-3-642-76298-7_5(91-111)Online publication date: 1991
https://doi.org/10.1007/978-3-642-76298-7_5
Jayasinghe JKaragiannis GEl-Hadidy FHerrmann OSmit J(1990)Two-level pipelined systolic array graphics engineIEEE Proceedings of the Custom Integrated Circuits Conference10.1109/CICC.1990.124759(17.2/1-17.2/4)Online publication date: 1990
https://doi.org/10.1109/CICC.1990.124759
Jayasinghe JHerrmann O(1989)Two-level pipelining of systolic array graphics enginesProceedings of the Fourth Eurographics conference on Advances in Computer Graphics Hardware10.5555/2421196.2421204(133-148)Online publication date: 1-Jan-1989
https://dl.acm.org/doi/10.5555/2421196.2421204
Gupta R(1989)PSProceedings of the Fourth Eurographics conference on Advances in Computer Graphics Hardware10.5555/2421196.2421202(91-111)Online publication date: 1-Jan-1989
https://dl.acm.org/doi/10.5555/2421196.2421202
Owen J(2007)Computer Graphics and Computer‐Aided Design Literature: A Keyword‐Indexed Bibliography for the Year 1988.Computer Graphics Forum10.1111/j.1467-8659.1989.tb00493.x8:3(249-261)Online publication date: 9-Oct-2007
https://doi.org/10.1111/j.1467-8659.1989.tb00493.x
Cox MHanrahan PCrockett THansen CWhitman S(1993)Pixel merging for object-parallel renderingProceedings of the 1993 symposium on Parallel rendering10.1145/166181.166188(49-56)Online publication date: 1-Nov-1993
https://dl.acm.org/doi/10.1145/166181.166188
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