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The VMP network adapter board (NAB): high-performance network communication for multiprocessors

Published: 01 August 1988 Publication History

Abstract

High performance computer communication between multiprocessor nodes requires significant improvements over conventional host-to-network adapters. Current host-to-network adapter interfaces impose excessive processing, system bus and interrupt overhead on a multiprocessor host. Current network adapters are either limited in function, wasting key host resources such as the system bus and the processors, or else intelligent but too slow, because of complex transport protocols and because of an inadequate internal memory architecture. Conventional transport protocols are too complex for hardware implementation and too slow without it.
In this paper, we describe the design of a network adapter board for the VMP multiprocessor machine that addresses these issues. The adapter uses a host interface that is designed for minimal latency, minimal interrupt processing overhead and minimal system bus and memory access overhead. The network adapter itself has a novel internal memory and processing architecture that implements some of the key performance-critical transport layer functions in hardware. This design is integrated with VMTP, a new transport protocol specifically designed for efficient implementation on an intelligent high-performance network adapter. Although targeted for the VMP system, the design is applicable to other multiprocessors as well as uni-processors.

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Information

Published In

cover image ACM SIGCOMM Computer Communication Review
ACM SIGCOMM Computer Communication Review  Volume 18, Issue 4
August 1988
338 pages
ISSN:0146-4833
DOI:10.1145/52325
Issue’s Table of Contents
  • cover image ACM Conferences
    SIGCOMM '88: Symposium proceedings on Communications architectures and protocols
    August 1988
    339 pages
    ISBN:0897912799
    DOI:10.1145/52324
    • Editor:
    • Vinton Cerf
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 August 1988
Published in SIGCOMM-CCR Volume 18, Issue 4

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Cited By

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  • (2007)Parallel processing scheme of the received data based on OSI protocolsElectronics and Communications in Japan (Part I: Communications)10.1002/ecja.441074110374:11(26-41)Online publication date: 23-Mar-2007
  • (2006)The VuNet desk area networkIEEE Journal on Selected Areas in Communications10.1109/49.38216113:4(710-721)Online publication date: 1-Sep-2006
  • (2006)Communication system for high‐performance distributed computingConcurrency: Practice and Experience10.1002/cpe.43300604046:4(251-270)Online publication date: 25-Oct-2006
  • (1998)Improving End System Performance for Multimedia Applications over High Bandwidth NetworksMultimedia Technologies and Applications for the 21st Century10.1007/978-0-585-28767-6_10(241-255)Online publication date: 1998
  • (1997)Throughput optimization for multimedia applications over high speed networksHigh Performance Networking VII10.1007/978-0-387-35279-4_7(101-114)Online publication date: 1997
  • (1996)LiteraturMultimedia im Netz10.1007/978-3-642-79203-8_8(233-248)Online publication date: 1996
  • (1995)Design of the APIC: A high performance ATM host-network interface chipProceedings of INFOCOM'9510.1109/INFCOM.1995.515875(179-187)Online publication date: 1995
  • (1994)Design of a header processor for the PSi implementation of the logical link control protocol in LANsProceedings of 3rd IEEE International Symposium on High Performance Distributed Computing10.1109/HPDC.1994.340235(270-277)Online publication date: 1994
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