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Interval-Based Analysis of Software Processes

Published: 01 August 2001 Publication History

Abstract

A typical characteristic of complex embedded systems is their large software share that consists of software processes either being directly written in an implementation language like C, or being created from abstract modeling tools (e. g. Simulink or StateMate) using standard code generators, or being reused from previous designs (e. g. legacy code). A major challenge is the safe integration of these separately designed system parts. This paper focuses on the formal analysis of software processes with respect to their non-functional properties like timing or power consumption. The proposed approach yields safe upper and lower bounds on these properties and has advantages over previous work in terms of accuracy and efficiency. Further, it is shown how the results of this process-level analysis can be utilized to generate a model for the system-wide validation of non-functional properties. The applicability of the approach is demonstrated using an example of a filter process operating on a packet stream.

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  • (2014)Optimal Pipeline Performance via Transactional Slice with No Branch Prediction OverheadProceedings of the 2014 UKSim-AMSS 16th International Conference on Computer Modelling and Simulation10.1109/UKSim.2014.35(405-410)Online publication date: 26-Mar-2014
  • (2018)SPIIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2002.80776710:4(379-389)Online publication date: 29-Dec-2018
  • (2018)Path clustering in software timing analysisIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/92.9748919:6(773-782)Online publication date: 29-Dec-2018
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Information

Published In

cover image ACM SIGPLAN Notices
ACM SIGPLAN Notices  Volume 36, Issue 8
Aug. 2001
245 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/384196
Issue’s Table of Contents
  • cover image ACM Conferences
    LCTES '01: Proceedings of the ACM SIGPLAN workshop on Languages, compilers and tools for embedded systems
    August 2001
    250 pages
    ISBN:1581134258
    DOI:10.1145/384197
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 August 2001
Published in SIGPLAN Volume 36, Issue 8

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Author Tags

  1. behavioral intervals
  2. software execution cost analysis
  3. system-level timing validation

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Cited By

View all
  • (2014)Optimal Pipeline Performance via Transactional Slice with No Branch Prediction OverheadProceedings of the 2014 UKSim-AMSS 16th International Conference on Computer Modelling and Simulation10.1109/UKSim.2014.35(405-410)Online publication date: 26-Mar-2014
  • (2018)SPIIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2002.80776710:4(379-389)Online publication date: 29-Dec-2018
  • (2018)Path clustering in software timing analysisIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/92.9748919:6(773-782)Online publication date: 29-Dec-2018
  • (2005)Exploiting Dynamic Workload Variation in Low Energy Preemptive Task SchedulingProceedings of the conference on Design, Automation and Test in Europe - Volume 110.1109/DATE.2005.146(634-639)Online publication date: 7-Mar-2005

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