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POSE: a parallel object-oriented synthesis environment

Published: 01 January 2001 Publication History

Abstract

Design automation tools and methodologies always encounter a problem of how systems may be designed efficiently, including issues such as static modeling and dynamic manipulation of system parts. With the rapid progress of design technology, the continuously increasing number of different choices per system part and the growing complexity of today's systems, the efficiency of the design environment is not only a major concern now, but will also be a demanding problem in the near future. In contrast to heuristic methods, a novel environment called POSE is proposed that increases efficiency during design without losing optimality in the final design results. System parts are modeled using the popular object-oriented modeling technique and are dynamically manipulated using the parallel design technique. A complete integration of object-oriented and parallel techniques is one of the major feature of POSE. Common problems related to parallel design such as emptiness and deadlock are also elegantly solved within POSE. Experimental results and formal analysis based on POSE all show its practical and theoretical usefulness. POSE can be used at any level of synthesis as long as off-the-shelf building-blocks manipulation is required. POSE can be applied especially to system-level synthesis, whose targets can be parallel computer architectures, systems-on-chip, or embedded systems. We will show how POSE has been applied to ICOS, a recently proposed synthesis methodology. Furthermore, POSE can be easily integrated with other heuristic design methodologies to allow increased design efficiency.

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Cited By

View all
  • (2001)Formal synthesis and code generation of embedded real-time softwareProceedings of the ninth international symposium on Hardware/software codesign10.1145/371636.371729(208-213)Online publication date: 25-Apr-2001
  • (2001)Formal synthesis and code generation of embedded real-time softwareNinth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)10.1109/HSC.2001.924677(208-213)Online publication date: 2001
  • (2000)Hardware-software timing coverification of concurrent embedded real-time systemsIEE Proceedings - Computers and Digital Techniques10.1049/ip-cdt:20000452147:2(83)Online publication date: 2000

Recommendations

Reviews

William R. Spillers

The author proposes a design environment which is object oriented and uses a parallel design technique. It is an extension of the author's earlier work on a system called ICOS (Intelligent Concurrent Object-Oriented Synthesis) and aimed at parallel computer architectures, systems on-a-chip, and embedded systems. Applications to a shared-memory multiprocessor and an SIMD machine are included. Interestingly, the author's work has application well beyond its use in the design of electronic devices. It seems to be part of a long tradition involving attempts to formalize the design process across all of engineering design. To do this it is necessary to have an abstract, formal procedure for describing design requirements and the integration of modules to realize these design requirements. The author has made serious steps in the direction of achieving these goals which makes this paper of considerable interest to the general design community.

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems  Volume 6, Issue 1
Jan. 2001
147 pages
ISSN:1084-4309
EISSN:1557-7309
DOI:10.1145/371254
Issue’s Table of Contents

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Association for Computing Machinery

New York, NY, United States

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Publication History

Published: 01 January 2001
Published in TODAES Volume 6, Issue 1

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Author Tags

  1. design-completion check
  2. hardware synthesis
  3. object-oriented technology
  4. parallel design
  5. synthesis rollback

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Cited By

View all
  • (2001)Formal synthesis and code generation of embedded real-time softwareProceedings of the ninth international symposium on Hardware/software codesign10.1145/371636.371729(208-213)Online publication date: 25-Apr-2001
  • (2001)Formal synthesis and code generation of embedded real-time softwareNinth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)10.1109/HSC.2001.924677(208-213)Online publication date: 2001
  • (2000)Hardware-software timing coverification of concurrent embedded real-time systemsIEE Proceedings - Computers and Digital Techniques10.1049/ip-cdt:20000452147:2(83)Online publication date: 2000

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