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Leakage-Aware Dynamic Thermal Management of 3D Memories

Published: 23 October 2020 Publication History

Abstract

3D memory systems offer several advantages in terms of area, bandwidth, and energy efficiency. However, thermal issues arising out of higher power densities have limited their widespread use. While prior works have looked at reducing dynamic power through reduced memory accesses, in these memories, both leakage and dynamic power consumption are comparable. Furthermore, as the temperature rises, the leakage power increases, creating a thermal-leakage loop. We study the impact of leakage power on 3D memory temperature and propose turning OFF specific memory channels to meet thermal constraints. Data is migrated to a 2D memory before closing a 3D channel. We introduce an analytical model to assess the 2D memory delay and use the model to guide data migration decisions. The above strategy is referred to as FastCool and provides an improvement of 22%, 19%, and 32% on average (up to 57%, 72%, and 82%) in performance, memory energy, and energy-delay product (EDP), respectively, on different workloads consisting of SPEC CPU2006 benchmarks.
We further propose a thermal management strategy named Energy-Efficient FastCool (EEFC), which improves upon FastCool by selecting the channels to be closed by considering temperature, leakage, access rate, and position of various 3D memory channels at runtime. Our experiments demonstrate that EEFC leads to an additional improvement of up to 30%, 30%, and 51% in performance, memory energy, and EDP compared to FastCool. Finally, we analyze the effects of process variations on the efficiency of the proposed FC and EEFC strategies. Variation in the manufacturing process causes changes in the leakage power and temperature profile. Since EEFC considers both while selecting channels for closure, it is more resilient to process variations and achieves a lower application execution time and memory energy compared to FastCool.

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  • (2024)NeuroTAP: Thermal and Memory Access Pattern-Aware Data Mapping on 3D DRAM for Maximizing DNN PerformanceACM Transactions on Embedded Computing Systems10.1145/367717823:6(1-30)Online publication date: 11-Sep-2024
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Published In

cover image ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems  Volume 26, Issue 2
March 2021
220 pages
ISSN:1084-4309
EISSN:1557-7309
DOI:10.1145/3430836
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 23 October 2020
Accepted: 01 August 2020
Revised: 01 August 2020
Received: 01 March 2020
Published in TODAES Volume 26, Issue 2

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Author Tags

  1. 3D memories
  2. dynamic thermal management
  3. energy efficiency
  4. leakage power

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  • Refereed

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  • Ministry of Electronics and Information Technology

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Cited By

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  • (2024)3D-TemPo: Optimizing 3-D DRAM Performance Under Temperature and Power ConstraintsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.336723543:8(2263-2276)Online publication date: Aug-2024
  • (2023)NeuroCool: Dynamic Thermal Management of 3D DRAM for Deep Neural Networks through Customized PrefetchingACM Transactions on Design Automation of Electronic Systems10.1145/363001229:1(1-35)Online publication date: 18-Dec-2023
  • (2023)Thermal Management for 3D-Stacked Systems via Unified Core-Memory Power RegulationACM Transactions on Embedded Computing Systems10.1145/360804022:5s(1-26)Online publication date: 31-Oct-2023
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