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ProMT: optimizing integrity tree updates for write-intensive pages in secure NVMs

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Amro AwadAuthors Info & Claims

ICS '21: Proceedings of the 35th ACM International Conference on Supercomputing

Pages 479 - 490

https://doi.org/10.1145/3447818.3460377

Published: 04 June 2021 Publication History

Abstract

Current computer systems are vulnerable to a wide range of attacks caused by the proliferation of accelerators, and the fact that current system comprise multiple SoCs provided from different vendors. Thus, major processor vendors are moving towards limiting the trust boundary to the processor chip only as in Intel's SGX, AMD's SME, and ARM's TrustZone. This secure boundary limitation requires protecting the memory content against data remanence attacks, which were performed against DRAM in the form of cold-boot attack and are more successful against NVM due to NVM's data persistency feature. However, implementing secure memory features, such as memory encryption and integrity verification has a non-trivial performance overhead, and can significantly reduce the emerging NVM's expected lifetime. Previous work looked at reducing the overheads of the secure memory implementation by packing more counters into a cache line, increasing the cacheability of security metadata, slightly reducing the size of the integrity tree, or using the ECC chip to store the MAC values. However, the root update process is barely studied, which requires a sequential update of the MAC values in all the integrity tree levels.

In this paper, we propose ProMT, a novel memory controller design that ensures a persistently secure system with minimal overheads. ProMT protects the data confidentiality and ensures the data integrity with minimal overheads. ProMT reduces the performance overhead of secure memory implementation to 11.7%, extends the NVM's life time by 3.59x, and enables the system recovery in a fraction of a second.

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Cited By

Thomas SWorkneh KMcCarty JIzraelevitz JLehman TBahar RTsafrir DMusuvathi MGupta RAbu-Ghazaleh N(2024)A Midsummer Night’s Tree: Efficient and High Performance Secure SCMProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 310.1145/3620666.3651354(22-37)Online publication date: 27-Apr-2024
https://dl.acm.org/doi/10.1145/3620666.3651354
Shadab RZou YGandham SAwad ALin M(2024)A Secure Computing System With Hardware-Efficient Lazy Bonsai Merkle Tree for FPGA-Attached Embedded MemoryIEEE Transactions on Dependable and Secure Computing10.1109/TDSC.2023.332493521:4(3262-3279)Online publication date: Jul-2024
https://doi.org/10.1109/TDSC.2023.3324935
Freij AZhou HSolihin Y(2023)SecPB: Architectures for Secure Non-Volatile Memory with Battery-Backed Persist Buffers2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071082(677-690)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10071082
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Index Terms

ProMT: optimizing integrity tree updates for write-intensive pages in secure NVMs
1. Security and privacy
  1. Security in hardware
    1. Hardware security implementation
      1. Hardware-based security protocols

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cover image ACM Conferences

ICS '21: Proceedings of the 35th ACM International Conference on Supercomputing

June 2021

506 pages

ISBN:9781450383356

DOI:10.1145/3447818

General Chairs:
Huiyang Zhou
North Carolina State University
,
Jose Moreira
IBM Research
,
Program Chairs:
Frank Mueller
North Carolina State University
,
Yoav Etsion
Technion

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Published: 04 June 2021

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ICS '21: 2021 International Conference on Supercomputing

June 14 - 17, 2021

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ICS '21 Paper Acceptance Rate 39 of 157 submissions, 25%;

Overall Acceptance Rate 629 of 2,180 submissions, 29%

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Cited By

Thomas SWorkneh KMcCarty JIzraelevitz JLehman TBahar RTsafrir DMusuvathi MGupta RAbu-Ghazaleh N(2024)A Midsummer Night’s Tree: Efficient and High Performance Secure SCMProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 310.1145/3620666.3651354(22-37)Online publication date: 27-Apr-2024
https://dl.acm.org/doi/10.1145/3620666.3651354
Shadab RZou YGandham SAwad ALin M(2024)A Secure Computing System With Hardware-Efficient Lazy Bonsai Merkle Tree for FPGA-Attached Embedded MemoryIEEE Transactions on Dependable and Secure Computing10.1109/TDSC.2023.332493521:4(3262-3279)Online publication date: Jul-2024
https://doi.org/10.1109/TDSC.2023.3324935
Freij AZhou HSolihin Y(2023)SecPB: Architectures for Secure Non-Volatile Memory with Battery-Backed Persist Buffers2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071082(677-690)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10071082
Huang JHua Y(2023)Root Crash Consistency of SGX-style Integrity Trees in Secure Non-Volatile Memory Systems2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071003(152-164)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10071003
Lei MWang FFeng DShuai XCao Y(2022)A Dynamic and Recoverable BMT Scheme for Secure Non-Volatile MemoryProceedings of the 51st International Conference on Parallel Processing10.1145/3545008.3545061(1-11)Online publication date: 29-Aug-2022
https://dl.acm.org/doi/10.1145/3545008.3545061
Han XTuck JAwad AHardavellas NCampanoni SGrot BKarpuzcu U(2022)Horus: Persistent Security for Extended Persistence-Domain Memory SystemsProceedings of the 55th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO56248.2022.00087(1255-1269)Online publication date: 1-Oct-2022
https://dl.acm.org/doi/10.1109/MICRO56248.2022.00087
Wang XTalapkaliyev DHicks MJian XHardavellas NCampanoni SGrot BKarpuzcu U(2022)Self-Reinforcing Memoization for Cryptography Calculations in Secure Memory SystemsProceedings of the 55th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO56248.2022.00055(678-692)Online publication date: 1-Oct-2022
https://dl.acm.org/doi/10.1109/MICRO56248.2022.00055
Wang XKotra JJian XHardavellas NCampanoni SGrot BKarpuzcu U(2022)Eager Memory Cryptography in CachesProceedings of the 55th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO56248.2022.00054(693-709)Online publication date: 1-Oct-2022
https://dl.acm.org/doi/10.1109/MICRO56248.2022.00054
Alwadi MWang RMohaisen DHughes CHammond SAwad A(2022)Minerva: Rethinking Secure Architectures for the Era of Fabric-Attached Memory Architectures2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS53621.2022.00033(258-268)Online publication date: May-2022
https://doi.org/10.1109/IPDPS53621.2022.00033

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