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- research-articleNovember 2024
EXTREMIS: Static Frequency Switching for Battery-less Devices
ENSsys '24: Proceedings of the 12th International Workshop on Energy Harvesting and Energy-Neutral Sensing SystemsPages 28–34https://doi.org/10.1145/3698384.3699616We present EXTREMIS, a compile-time pipeline that improves energy consumption of battery-less devices by ensuring that memory operations occur at the most efficient device frequency setting. Different memory operations incur different energy consumption ...
- research-articleNovember 2024JUST ACCEPTED
SPIRIT: Scalable and Persistent In-Memory Indices for Real-Time Search
ACM Transactions on Architecture and Code Optimization (TACO), Just Accepted https://doi.org/10.1145/3703351Today, real-time search over big microblogging data requires low indexing and query latency. Online services, therefore, prefer to host inverted indices in memory. Unfortunately, as datasets grow, indices grow proportionally, and with limited DRAM scaling,...
- research-articleAugust 2024
Data Pruning-enabled High Performance and Reliable Graph Neural Network Training on ReRAM-based Processing-in-Memory Accelerators
ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 29, Issue 5Article No.: 72, Pages 1–29https://doi.org/10.1145/3656171Graph Neural Networks (GNNs) have achieved remarkable accuracy in cognitive tasks such as predictive analytics on graph-structured data. Hence, they have become very popular in diverse real-world applications. However, GNN training with large real-world ...
- research-articleJune 2024
Determining Recoverable Consensus Numbers
PODC '24: Proceedings of the 43rd ACM Symposium on Principles of Distributed ComputingPages 3–13https://doi.org/10.1145/3662158.3662775Herlihy's wait-free consensus hierarchy classifies the power of object types in asynchronous shared memory systems where processes can permanently crash (i.e. stop taking steps). In this hierarchy a type has consensus number n if objects of that type can ...
Developing Index Structures in Persistent Memory Using Spot-on Optimizations with DRAM
ICPE '24: Proceedings of the 15th ACM/SPEC International Conference on Performance EngineeringPages 107–117https://doi.org/10.1145/3629526.3645032The emergence of persistent memory (PMem) is greatly impacting the design of commonly used data structures to obtain the full benefit from the new technology. Compared to the DRAM, PMem's larger capacity and lower cost make it an attractive alternative ...
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- research-articleApril 2024
Skip It: Take Control of Your Cache!
ASPLOS '24: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2Pages 1077–1094https://doi.org/10.1145/3620665.3640407Mechanisms to explicitly manage the presence of data in caches are fundamental for the correctness and performance of modern systems. These operations, while critical, often incur significant performance penalties even when carefully used. Moreover, ...
- posterFebruary 2024
POSTER: RELAX: Durable Data Structures with Swift Recovery
PPoPP '24: Proceedings of the 29th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel ProgrammingPages 475–476https://doi.org/10.1145/3627535.3638469Recent non-volatile main memory technology gave rise to an abundance of research on building persistent data structures, whose content can be recovered after a system crash. While there has been significant progress in making durable data structures ...
- research-articleJanuary 2024
Exploiting Flat Namespace to Improve File System Metadata Performance on Ultra-Fast, Byte-Addressable NVMs
ACM Transactions on Storage (TOS), Volume 20, Issue 1Article No.: 2, Pages 1–47https://doi.org/10.1145/3620673The conventional file system provides a hierarchical namespace by structuring it as a directory tree. Tree-based namespace structure leads to inefficient file path walk and expensive namespace tree traversal, underutilizing ultra-low access latency and ...
- research-articleJanuary 2024
Approximate Similarity-Aware Compression for Non-Volatile Main Memory
Journal of Computer Science and Technology (JCST), Volume 39, Issue 1Pages 63–81https://doi.org/10.1007/s11390-023-2565-7AbstractImage bitmaps, i.e., data containing pixels and visual perception, have been widely used in emerging applications for pixel operations while consuming lots of memory space and energy. Compared with legacy DRAM (dynamic random access memory), non-...
- research-articleJanuary 2024
A hybrid memory architecture supporting fine-grained data migration
Frontiers of Computer Science: Selected Publications from Chinese Universities (FCS), Volume 18, Issue 2https://doi.org/10.1007/s11704-023-2675-yAbstractHybrid memory systems composed of dynamic random access memory (DRAM) and Non-volatile memory (NVM) often exploit page migration technologies to fully take the advantages of different memory media. Most previous proposals usually migrate data at a ...
- ArticleDecember 2023
Silent Stores in the Battery-less Internet of Things: A Good Idea?
EWSN '23: Proceedings of the 2023 International Conference on embedded Wireless Systems and NetworksPages 40–45We present experimental results investigating the use of silent stores in the battery-less Internet of Things (IoT). Silent stores occur in a program when the value being written onto memory exactly matches the memory content; general-purpose computing ...
- research-articleOctober 2023
TreeSLS: A Whole-system Persistent Microkernel with Tree-structured State Checkpoint on NVM
SOSP '23: Proceedings of the 29th Symposium on Operating Systems PrinciplesPages 1–16https://doi.org/10.1145/3600006.3613160Whole-system persistence promises simplified application deployment and near-instantaneous recovery. This can be implemented using single-level store (SLS) through periodic checkpointing of ephemeral state to persistent devices. However, traditional ...
- research-articleOctober 2023
Falcon: Fast OLTP Engine for Persistent Cache and Non-Volatile Memory
SOSP '23: Proceedings of the 29th Symposium on Operating Systems PrinciplesPages 531–544https://doi.org/10.1145/3600006.3613141Non-volatile memory(NVM) has the properties of both byte addressable and persistence, which provides new opportunities for building on-line transaction processing (OLTP) engines. Recently, a new feature called eADR puts CPU cache also in the ...
Spirea: A Mechanized Concurrent Separation Logic for Weak Persistent Memory
Proceedings of the ACM on Programming Languages (PACMPL), Volume 7, Issue OOPSLA2Article No.: 244, Pages 632–657https://doi.org/10.1145/3622820Weak persistent memory (a.k.a. non-volatile memory) is an emerging technology that offers fast byte-addressable durable main memory. A wealth of algorithms and libraries has been developed to explore this exciting technology. As noted by others, ...
- research-articleSeptember 2023
General-purpose Asynchronous Periodic Checkpointing in Hybrid Memory
ICPP '23: Proceedings of the 52nd International Conference on Parallel ProcessingPages 675–684https://doi.org/10.1145/3605573.3605648Non-volatile memory (NVM) is attractive because it enables us to make in-memory data structures persistent without serialization overhead. To implement persistent data structures durable against crashes, periodic checkpointing in NVM has been well ...
- research-articleJune 2023
Hamming Tree: The Case for Energy-Aware Indexing for NVMs
Proceedings of the ACM on Management of Data (PACMMOD), Volume 1, Issue 2Article No.: 182, Pages 1–27https://doi.org/10.1145/3589327Non-volatile memory (NVM) technologies are widely adopted in data storage solutions and battery-powered mobile and IoT devices. Wear-out and energy efficiency are two vital challenges facing the use of NVM. In Hamming Tree, we propose a software-level ...
- research-articleJune 2023
TurboHash: A Hash Table for Key-value Store on Persistent Memory
SYSTOR '23: Proceedings of the 16th ACM International Conference on Systems and StoragePages 35–48https://doi.org/10.1145/3579370.3594766Major efforts on the design of persistent hash table on a non-volatile byte-addressable memory focus on efficient support of crash consistency with fence/flush primitives as well on non-disruptive table rehashing operations. When a data entry in a ...
- research-articleMay 2023
Intelligent Data Migration Policies in a Write-Optimized Copy-on-Write Tiered Storage Stack
CHEOPS '23: Proceedings of the 3rd Workshop on Challenges and Opportunities of Efficient and Performant Storage SystemsPages 17–26https://doi.org/10.1145/3578353.3589543Modern storage stacks increasingly aim to intellegently optimize data accesses to improve latency, throughput, and energy consumption. Additionally, new storage setups become more heterogeneous, due to the introduction of new storage media, like NVM, ...
Integrating Non-Volatile Main Memory in a Deterministic Database
EuroSys '23: Proceedings of the Eighteenth European Conference on Computer SystemsPages 672–686https://doi.org/10.1145/3552326.3567494Deterministic databases provide strong serializability while avoiding concurrency-control related aborts by establishing a serial ordering of transactions before their execution. Recent work has shown that they can also handle skewed and contended ...
- keynoteApril 2023
Non-Volatile Hardware Transactional Memory: Challenges, Advancements, and Future Directions
ICPE '23 Companion: Companion of the 2023 ACM/SPEC International Conference on Performance EngineeringPage 371https://doi.org/10.1145/3578245.3584848Transactional memory (TM) has emerged as a powerful paradigm to simplify concurrent programming. Nowadays, hardware-based TM (HTM) implementations are available in several mainstream CPUs (e.g., by ARM, Intel and IBM). Due to their hardware nature, HTM ...