In-memory Processing based on Time-domain Circuit
Authors: 
Yuyao Kong, Jun YangAuthors Info & Claims
Pages 435 - 438
Abstract
Deep Neural Networks (DNN) have emerged as a dominant algorithm for machine learning (ML). High performance and extreme energy efficiency are critical for deployments of DNN, especially in mobile platforms such as autonomous vehicles, cameras, and other devices of internet of things. However, DNNs lead to massive data movement and memory accesses, which prevents it from being integrated into always-on Internet-of-Things (IoT) devices. Recently, computing in-memory (CIM) architectures embeds analog computation circuits in/near the memory arrays. It significantly reduces data movement energy. This paper summarizes the most recent novel methods on the CIM architectures based on the time-domain computation. Compared with voltage-domain and frequency-domain analog computing method, time-domain computation provides more flexibility, higher accuracy and greater scalability for larger neural networks. Thereafter, the first in-memory binary weight network (BWN) processor based on pulse-width modulation in which the feature is stored in memory is also presented. This work significantly reduces memory accesses (4x), and achieves state-of-the-art peak energy efficiency of 119.7TOPS/W.
References
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Information
Published In
May 2019
562 pages
ISBN:9781450362528
DOI:10.1145/3299874
- General Chairs:
- Houman Homayoun,
- Baris Taskin,
- Program Chairs:
- Tinoosh Mohsenin,
- Weisheng Zhao
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Publication History
Published: 13 May 2019
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- Research-article
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- National Natural Science Foundation of China
- National Science and Technology Project under Grant
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GLSVLSI '19
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