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Low-level router design and its impact on supercomputer system performance

Authors:

V. Puente,

J. A. Gregorio,

C. Izu,

R. Beivide,

F. VallejoAuthors Info & Claims

ICS '99: Proceedings of the 13th international conference on Supercomputing

Pages 193 - 201

https://doi.org/10.1145/305138.305193

Published: 01 May 1999 Publication History

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Cited By

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Puente VGregorio JVallejo FBeivide RIzu C(2006)High-performance adaptive routing for networks with arbitrary topologyJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2005.09.00352:6(345-358)Online publication date: 1-Jun-2006
https://dl.acm.org/doi/10.1016/j.sysarc.2005.09.003
Sancho JMartinez JRobles ALopez PFlich JDuato J(2003)Performance evaluation of COWS under real parallel applicationsProceedings International Parallel and Distributed Processing Symposium10.1109/IPDPS.2003.1213371(10)Online publication date: 2003
https://doi.org/10.1109/IPDPS.2003.1213371
Carrion MDiaz GCaminero B(2001)Performance issues of deterministic and adaptive ghost-packet routersInternational Conference on Parallel Processing, 2001.10.1109/ICPP.2001.952044(33-40)Online publication date: 2001
https://doi.org/10.1109/ICPP.2001.952044
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Information & Contributors

Information

Published In

ICS '99: Proceedings of the 13th international conference on Supercomputing

June 1999

509 pages

ISBN:158113164X

DOI:10.1145/305138

Chairmen:
Theodore Papatheodorou
Univ. of Patras, Patras, Greece
,
Mateo Valero
Univ. Politècnica de Catalunya, Barcelona, Spain
,
Constantine D. Polychronopoulos
Univ. of Illinois
,
Yoichi Muraoka
Waseda Univ.
,
Jesus Labarta
Univ. Politècnica de Catalunya, Barcelona, Spain

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 May 1999

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ICS99: The 13th ACM International Conference on Supercomputing

June 20 - 25, 1999

Rhodes, Greece

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ICS '99 Paper Acceptance Rate 57 of 180 submissions, 32%;

Overall Acceptance Rate 629 of 2,180 submissions, 29%

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Cited By

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Puente VGregorio JVallejo FBeivide RIzu C(2006)High-performance adaptive routing for networks with arbitrary topologyJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2005.09.00352:6(345-358)Online publication date: 1-Jun-2006
https://dl.acm.org/doi/10.1016/j.sysarc.2005.09.003
Sancho JMartinez JRobles ALopez PFlich JDuato J(2003)Performance evaluation of COWS under real parallel applicationsProceedings International Parallel and Distributed Processing Symposium10.1109/IPDPS.2003.1213371(10)Online publication date: 2003
https://doi.org/10.1109/IPDPS.2003.1213371
Carrion MDiaz GCaminero B(2001)Performance issues of deterministic and adaptive ghost-packet routersInternational Conference on Parallel Processing, 2001.10.1109/ICPP.2001.952044(33-40)Online publication date: 2001
https://doi.org/10.1109/ICPP.2001.952044
Puente VBeivide RGregorio JPrellezo JDuato JIzu C(1999)Adaptive bubble router: a design to improve performance in torus networksProceedings of the 1999 International Conference on Parallel Processing10.1109/ICPP.1999.797388(58-67)Online publication date: 1999
https://doi.org/10.1109/ICPP.1999.797388
Puente VPrellezo JIzu CGregorio JBeivide R(1999)A case study of trace-driven simulation for analyzing interconnection networks: cc-NUMAs with ILP processorsProceedings 8th Euromicro Workshop on Parallel and Distributed Processing10.1109/EMPDP.2000.823409(174-180)Online publication date: 1999
https://doi.org/10.1109/EMPDP.2000.823409
Puente VGregorio JBeivide RIzu C(1999)Impact of the Head-of-Line Blocking on Parallel Computer Networks: Hardware to Applications⋆Euro-Par’99 Parallel Processing10.1007/3-540-48311-X_173(1222-1230)Online publication date: 6-Aug-1999
https://doi.org/10.1007/3-540-48311-X_173

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